A new ASICX design center at PSI Chip

A new ASICX design center at PSI Chip Design Core Group 2008 CHIPP Annual Pleanary Meeting EPFL 9. September 2008 Roland Horisberger Paul Scherrer Institut

History of Chip Design at PSI (1989 2007) Chip design at PSI started in 1989 for planned B-Meson factory at PSI Tech. • PSI 1 SAC 3 m • PSI 2 SAC 3 m • • PSI 18 SAC 1 m • • PSI 26 • • PSI 30 • • PSI 43 • • PSI 46 • • • PSI ~65 Function Experiment Silicon strip readout 32 channels Signal sampler (drift chamber), 300 MHz m n experiment Pi. Beta exp. Silicon strip pipeline(32) chip APC 128 H 1 -vertex detector HERMES (MSGC) DMILL Pixel Prototype Chip for CMS DMILL Pixel Testbeam Chip for CMS DMILL Full CMS Pixel ROC 0. 25 m Full CMS Pixel ROC ( final chip) Chips for x-ray Pixel Systems, PILATUS 1, 2 & XFS CMS Pixel ROC x-ray Strips, Signal Samples MYTHEN DRS MEG, Magic 1. 4. 2006

Chip Design at PSI (1989 2007) PSI SLS X-ray Pixel PILATUS chips Pi. Beta Experiment wave form sampler Chip (R. Schnyder) (Ch. Brönnimann) PSI SLS X-ray Strips MYTHEN chips (B. Schmidt) ASIC CAD installation MEG Experiment wave form sampler DRS chips (St. Ritt) Past working model: by PSI LTP-group (R. H. ) Desy Zeuthen silicon strip readout rad. hard APC 128 chips (I. Tsurin) Other groups plug into existing ASIC CAD installation & culture with their own manpower and get quickly productive good for us too ! maintained critical size of effort ! 1. 4. 2006

New Chip Design Core Group 2008 New model: • New Chip Design Core Team maintains ASIC CAD • PSI internal groups and external University groups as plug in users • Chip Design Core Team helps, but does not their work ! PSI Group PSI experiment Chip to be done PSI SLS Pixel Group New x-ray pixel det. PILATUS XFS ASIC CAD installation by PSI Chip Design Core Team PSI CMS Pixel Group SLHC upgrade New Pixel ROC University Groups e. g. LHCb upgrade new super chip 1. 4. 2006

Chip–Design–Core–Group at PSI (Since 2008) Over last 10 years very good experience inside PSI with following model: 1) A core group keeps basic chip design CAD effort going and works on own projects (chips) (historical done by CMS pixel group) 2) Interested groups can plug in and get helped with basic start up, support, consultation and evtl. cooperation Examples: Pilatus x-ray pixel detector for SLS Mythen Silicon Strip x-ray detector for SLS APC 128_DSM ( DESY, Zeuthen) Domino Sampling Chip for MEG, Magic, etc. 3) 4) 5) 6) With new created Chip-Design-Core-Group model is now official. Expand “plug in user groups” beyond PSI to CH university groups • PSI acts as CH facility for activities with major setup efforts • Strengthens links PSI Universities ( CAD maintenance)

Chip–Design–Core–Group at PSI Currently 3 people in PSI Electronic group of Nick Schlumpf (LTP): Beat Meier Physicist / Electric Engineer Roberto Dinapoli Electric Engineer Xintiab Shi Electric Engineer

The Mythen. II readout chip x-ray photon silicon strip readout. 128 channels , 50 um pitch 24 bit counter/strip -> high dynamic range Low noise -> 195 ENC, high rate 1 MHz Mythen. II Strip sensor

CMS Pixel Read Out Chip • 0. 25 mm CMOS Technology • 1. 28 million transistors 100 m CAD picture of a pixel 150 m • 251 Transistors /pixel 9. 8 mm • radiation hard design ( ~40 Mrad) IBM_PSI 46

Domino Ring Sampler (DRS) Chip (Stefan Ritt. PSI) • 12 channels each 1024 samples deep • Sampling speed 10 MHz … 5 GHz • 0. 25 mm CMOS process 5 x 5 mm 2, radiation hard 0. 2 -2 ns Inverter “Domino” ring chain IN Waveform stored Clock Shift Register Out FADC 33 MHz

Pilatus XFS: the pixel Paul Scherrer Institut • 5232 Villigen PSI Roberto Dinapoli