The Latchup Monitor System Raffaello Secondo Contents 1

The Latchup Monitor System Raffaello Secondo Contents 1. The Latchup and Single Event Latchup (SEL) 2. The SEL test and Latchup Monitor system: State of the Art 3. Description of the project R. Secondo, A Masi, R. Losito, P. Peronnard, R. D’Aguanno, R. Ferraro The Latchup Monitor System, ESA Meeting, December 9 th 2014

1– The Single Event Latchup (SEL) and Latchup Ø A Single Event Latchup is a type of short circuit , more specifically it is the inadvertent creation of a lowimpedance path between the power supply rails of a CMOS structure caused by the impact of ionized particles Ø A power cycle is required to correct this situation. Short circuit on the power supply Anti-latchup protection Other Latchup reasons on CMOS chips and/or devices: Ø A spike of positive or negative voltage on an input or output pin of a digital chip R. Secondo, A Masi, R. Losito, P. Peronnard, R. D’Aguanno, R. Ferraro The Latchup Monitor System, ESA Meeting, December 9 th 2014

2–The SEL test and Latchup Monitor system: State of The Art The SEL radiation tests aim at evaluating the Latchup cross section of a component off the shelf (COTS) 230 Me. V Proton beam facility PIF at PSI used for SEL radiation tests Multiple devices under test usually 20 -30 chips to test simultaneously BEHAVIOR WITHOUT ANTI-LATCHUP Keen Anti-Latchup Protection I(Load) LATCHUP DETECTED Latchup Current fast acquisition Ø Multiple devices are irradiated at the same time to increase the number of occurrences Ø Each devices must be supplied with an efficient antilatchup power supply Ø The current waveform study after the anti-latchup intervention can help to understand the phenomenon DEVICE IS SHUT DOWN Time R. Secondo, A Masi, R. Losito, P. Peronnard, R. D’Aguanno, R. Ferraro The Latchup Monitor System, ESA Meeting, December 9 th 2014

2–The SEL test and Latchup Monitor system: State of The Art A Latch. Up Monitor based on commercial instrumentation: PXI for driving DAQ, power supplies and temperature acquisition Power Supply for the Latchup protection chassis Power Supply for the DUTs Data acquisition system Latchup protection chassis BNC harness for current acquisition (DAQ sampling period is about 10 s) Temperature patch panel Not compact and modular Problems of noise, space and transportability R. Secondo, A Masi, R. Losito, P. Peronnard, R. D’Aguanno, R. Ferraro The Latchup Monitor System, ESA Meeting, December 9 th 2014

3. Description of the project: The Lat. Mon PXI card Requirements: Hardware architecture Ø 0 to 15 V & -15 to 0 – 3 A Isolated power outputs Ø 16 -bit voltage and current programming Ø 16 -bit 2 MS/s current reading Ø Temperature monitoring of the DUT Ø Current protection trigger based on current threshold and current profile Ø Output disabling upon current protection triggering Ø Real time current consumption recording upon current protection triggering Ø PXI format FPGA architecture R. Secondo, A Masi, R. Losito, P. Peronnard, R. D’Aguanno, R. Ferraro The Latchup Monitor System, ESA Meeting, December 9 th 2014

3. Description of the project The state of the art The future Our Lat. Mon system: • Compact The Babele`s tower • Modular (up to 34 output channels) R. Secondo, A Masi, R. Losito, P. Peronnard, R. D’Aguanno, R. Ferraro The Latchup Monitor System, ESA Meeting, December 9 th 2014

3. Description of the project: The Lab. View Software developed Management Software In Lab. View An example of latchup acquisition Latchup profiles programming R. Secondo, A Masi, R. Losito, P. Peronnard, R. D’Aguanno, R. Ferraro The Latchup Monitor System, ESA Meeting, December 9 th 2014

4– Follow up on the Lat. MON Project - LATCHUP MONITORING: - COMPACT AND MODULAR - ENABLES SETTING OF A CURRENT PROFILE - RADIATION TESTS AT CHARM IN 2015. Schedule: - Production of a pre-series of 5 cards to test the driver on a full system - Test of a complete system based on 17 PXI cards. R. Secondo, A Masi, R. Losito, P. Peronnard, R. D’Aguanno, R. Ferraro The Latchup Monitor System, ESA Meeting, December 9 th 2014