Processor Architecture Kieran Mathieson Outline n n Memory

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Processor Architecture Kieran Mathieson

Processor Architecture Kieran Mathieson

Outline n n Memory CPU Structure n n n Design a CPU Programming Design

Outline n n Memory CPU Structure n n n Design a CPU Programming Design Issues

Memory

Memory

Memory n n Made up of bits Fixed word (cell) size Cells contain instructions

Memory n n Made up of bits Fixed word (cell) size Cells contain instructions and data Each word has an address n n Flat memory model Segmented memory model

CPU Structure

CPU Structure

CPU Structure n n Fetch/execute cycle Registers used to operate on data n n

CPU Structure n n Fetch/execute cycle Registers used to operate on data n n n Control unit interprets instructions n n Scratchpad Special-purpose registers – instruction register, instruction pointer, program status word Opens and closes the right gates to move data around ALU performs computations

Design a CPU n n n Decimal for simplicity 1, 000 word of RAM

Design a CPU n n n Decimal for simplicity 1, 000 word of RAM - each 4 digits long 10 registers – numbered 0 to 9 Special-purpose registers - instruction register, instruction pointer Create an instruction set n n Input/output Move data between registers and memory Computation Branching

Program n n Write a program to input two numbers, add them, and output

Program n n Write a program to input two numbers, add them, and output Write a program to add up some numbers the user inputs n The user specifies how many numbers to add

What It Looks Like

What It Looks Like

CPU Design Issues n n Word size CISC vs. RISC Clock speed Electrical properties

CPU Design Issues n n Word size CISC vs. RISC Clock speed Electrical properties – heat, circuit length, fabrication

Outline n n Memory CPU Structure n n n Design a CPU Programming Design

Outline n n Memory CPU Structure n n n Design a CPU Programming Design Issues