Domenico Argenziano Tutor Alessandro Cilardo XXX Cycle I
![Domenico Argenziano Tutor: Alessandro Cilardo XXX Cycle - I year presentation Securing the Cloud Domenico Argenziano Tutor: Alessandro Cilardo XXX Cycle - I year presentation Securing the Cloud](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-1.jpg)
![Background • MSc. : Laurea Magistrale in Ingegneria Informatica • MSc. Thesis in Embedded Background • MSc. : Laurea Magistrale in Ingegneria Informatica • MSc. Thesis in Embedded](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-2.jpg)
![Homomorphic Encryption • Performing computation directly on ciphertexts • Enc(A + B) = Enc(A) Homomorphic Encryption • Performing computation directly on ciphertexts • Enc(A + B) = Enc(A)](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-3.jpg)
![Our goal • Design and develop an FPGA-base accelerator for homomorphic primitives. • Meant Our goal • Design and develop an FPGA-base accelerator for homomorphic primitives. • Meant](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-4.jpg)
![Training • Study of advanced algebraic topics • Study of best algorithms for the Training • Study of advanced algebraic topics • Study of best algorithms for the](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-5.jpg)
![Our contribute • Design of a distributed on-chip accelerator • Easily scalable wrt shared Our contribute • Design of a distributed on-chip accelerator • Easily scalable wrt shared](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-6.jpg)
![First Results • Currently, most key component have been developed and tested. • Preliminary First Results • Currently, most key component have been developed and tested. • Preliminary](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-7.jpg)
![Products • Altera’s Innovate Europe Context, Best Project in So. C Design award. • Products • Altera’s Innovate Europe Context, Best Project in So. C Design award. •](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-8.jpg)
![Current work • Project proposal which integrate Homomorphic Encryption with Information Flow Control techniques. Current work • Project proposal which integrate Homomorphic Encryption with Information Flow Control techniques.](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-9.jpg)
![Project WISCH • Fellowship won in July • Working on the project from August Project WISCH • Fellowship won in July • Working on the project from August](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-10.jpg)
![TEE Architecture 11 TEE Architecture 11](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-11.jpg)
![1° year credits Credits Modules Seminars Research 24 1. 2 35 12 1° year credits Credits Modules Seminars Research 24 1. 2 35 12](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-12.jpg)
![Next year training Module CFU Network Security 6 Machine Learning and appl. 6 Advanced Next year training Module CFU Network Security 6 Machine Learning and appl. 6 Advanced](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-13.jpg)
- Slides: 13
![Domenico Argenziano Tutor Alessandro Cilardo XXX Cycle I year presentation Securing the Cloud Domenico Argenziano Tutor: Alessandro Cilardo XXX Cycle - I year presentation Securing the Cloud](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-1.jpg)
Domenico Argenziano Tutor: Alessandro Cilardo XXX Cycle - I year presentation Securing the Cloud with FPGAaccelerated Homomorphic Encryption
![Background MSc Laurea Magistrale in Ingegneria Informatica MSc Thesis in Embedded Background • MSc. : Laurea Magistrale in Ingegneria Informatica • MSc. Thesis in Embedded](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-2.jpg)
Background • MSc. : Laurea Magistrale in Ingegneria Informatica • MSc. Thesis in Embedded Systems • Current Research Group: Computer Architectures and Reconfigurable Hardware • Tutor: Alessandro Cilardo 2
![Homomorphic Encryption Performing computation directly on ciphertexts EncA B EncA Homomorphic Encryption • Performing computation directly on ciphertexts • Enc(A + B) = Enc(A)](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-3.jpg)
Homomorphic Encryption • Performing computation directly on ciphertexts • Enc(A + B) = Enc(A) + Enc(B) • Enc(A * B) = Enc(A) * Enc(B) • Delegating computation to third untrusted party (Cloud Server) • Very computing intensive 3
![Our goal Design and develop an FPGAbase accelerator for homomorphic primitives Meant Our goal • Design and develop an FPGA-base accelerator for homomorphic primitives. • Meant](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-4.jpg)
Our goal • Design and develop an FPGA-base accelerator for homomorphic primitives. • Meant to be used in an heterorogeneous computing environment (HPC/Cloud) • An ad-hoc solution, alternative to softwareonly approaches. 4
![Training Study of advanced algebraic topics Study of best algorithms for the Training • Study of advanced algebraic topics • Study of best algorithms for the](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-5.jpg)
Training • Study of advanced algebraic topics • Study of best algorithms for the most critical operations: modular addition/multiplication on very long operands (~ 100 K bits) • Study of the state-of-the-art research: – Most solutions are CPU/GPU based – Just a few are FPGA/ASIC based 5
![Our contribute Design of a distributed onchip accelerator Easily scalable wrt shared Our contribute • Design of a distributed on-chip accelerator • Easily scalable wrt shared](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-6.jpg)
Our contribute • Design of a distributed on-chip accelerator • Easily scalable wrt shared memory approach used in existing literature • Suitable also for off-chip scenario (e. g. more boards interconnected • FPGA-specific optimizations 6
![First Results Currently most key component have been developed and tested Preliminary First Results • Currently, most key component have been developed and tested. • Preliminary](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-7.jpg)
First Results • Currently, most key component have been developed and tested. • Preliminary results show a substantial performance speed-up and lower resource usage wrt similar solutions • Next steps: put together the whole distributed architecture, physical verification (FPGA-in-the -loop) 7
![Products Alteras Innovate Europe Context Best Project in So C Design award Products • Altera’s Innovate Europe Context, Best Project in So. C Design award. •](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-8.jpg)
Products • Altera’s Innovate Europe Context, Best Project in So. C Design award. • Two accepted articles for: – 10 th International Conference on P 2 P, Parallel, Grid, Cloud and Internet Computing – 3 rd International Workshop on Cloud and Distributed System Applications • A third article submitted for Design Automation and Test in Europe (DATE 16) 8
![Current work Project proposal which integrate Homomorphic Encryption with Information Flow Control techniques Current work • Project proposal which integrate Homomorphic Encryption with Information Flow Control techniques.](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-9.jpg)
Current work • Project proposal which integrate Homomorphic Encryption with Information Flow Control techniques. • Mixing computing on uncrypted and crypted data • Prevent information leakage through language semantics • Static (compiler) or dynamic (monitor) approaches 9
![Project WISCH Fellowship won in July Working on the project from August Project WISCH • Fellowship won in July • Working on the project from August](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-10.jpg)
Project WISCH • Fellowship won in July • Working on the project from August • Research activity directed by prof. Clemente Galdi • Designing a cryptographic filesystem running in a Trusted Execution Environment • Enforcing security policies 10
![TEE Architecture 11 TEE Architecture 11](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-11.jpg)
TEE Architecture 11
![1 year credits Credits Modules Seminars Research 24 1 2 35 12 1° year credits Credits Modules Seminars Research 24 1. 2 35 12](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-12.jpg)
1° year credits Credits Modules Seminars Research 24 1. 2 35 12
![Next year training Module CFU Network Security 6 Machine Learning and appl 6 Advanced Next year training Module CFU Network Security 6 Machine Learning and appl. 6 Advanced](https://slidetodoc.com/presentation_image_h2/8b0e2d666699cf8568776cdd8d7cb603/image-13.jpg)
Next year training Module CFU Network Security 6 Machine Learning and appl. 6 Advanced computer architecture 6 13