A Power Efficient System Design Methodology Employing Approximate

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A Power Efficient System Design Methodology Employing Approximate Arithmetic Units Tuba Ayhan, Fırat Kula,

A Power Efficient System Design Methodology Employing Approximate Arithmetic Units Tuba Ayhan, Fırat Kula, Mustafa Altun Istanbul Technical University Electronics and Communication Engineering Department Istanbul, Turkey Emerging Circuits and Computation (ECC) Group –

Approximate Adders Dutt et. al. 2016 Shin & Gupta, 2008 Avg. Error Distance Zhu

Approximate Adders Dutt et. al. 2016 Shin & Gupta, 2008 Avg. Error Distance Zhu et. al. 2010 Mahdiani et. al. 2010 Fig. Dutt et. al. 2016, VLSID Exact Adder Error Distance = |Sa - Se| A library for approximate adders and multipliers: Mrazek et. al. 2017, DATE http: //www. fit. vutbr. cz/research/groups/ehw/approxlib/index. html T. AYHAN - A POWER EFFICIENT SYSTEM DESIGN METHODOLOGY EMPLOYING APPROXIMATE ARITHMETIC UNITS - ISVLSI 2017 2

Input IN Desired output Processing + LPF X Z-n MAC C MEM + x.

Input IN Desired output Processing + LPF X Z-n MAC C MEM + x. CO R Power consumption PSNR Compression Ratio Error rate … Rec. F T. AYHAN - A POWER EFFICIENT SYSTEM DESIGN METHODOLOGY EMPLOYING APPROXIMATE ARITHMETIC UNITS - ISVLSI 2017 3

Input IN Desired output Processing + LPF X Z-n MAC ACC C MEM +

Input IN Desired output Processing + LPF X Z-n MAC ACC C MEM + x. CO COR R Power consumption PSNR Compression Ratio Error rate … Rec. F 2 T. AYHAN - A POWER EFFICIENT SYSTEM DESIGN METHODOLOGY EMPLOYING APPROXIMATE ARITHMETIC UNITS - ISVLSI 2017 4

Input IN Desired output Processing + LPF X Z-n MAC C MEM + x.

Input IN Desired output Processing + LPF X Z-n MAC C MEM + x. CO R Power consumption PSNR Compression Ratio Error rate … Rec. F T. AYHAN - A POWER EFFICIENT SYSTEM DESIGN METHODOLOGY EMPLOYING APPROXIMATE ARITHMETIC UNITS - ISVLSI 2017 5

Block Analysis Power model SYS 1. Performance metrics 2. Performance correlation 1. Arithmetic errors

Block Analysis Power model SYS 1. Performance metrics 2. Performance correlation 1. Arithmetic errors sensitivity 2. Arithmetic units’ correlation Power – error relationship: Pu = f(Eu) B 1 B 4 B 2 B 3 Power Forward Analysis Accuracy: RMSE Optimization Linear/nonlinear programming with linear constraints Realization T. AYHAN - A POWER EFFICIENT SYSTEM DESIGN METHODOLOGY EMPLOYING APPROXIMATE ARITHMETIC UNITS - ISVLSI 2017 6

Total power consumption of arithmetic computing units will be minimized. The desired performance will

Total power consumption of arithmetic computing units will be minimized. The desired performance will be maintained b Ultimate performance depends on 1. Arithmetic computing X 2. Connections between and within the blocks B T. AYHAN - A POWER EFFICIENT SYSTEM DESIGN METHODOLOGY EMPLOYING APPROXIMATE ARITHMETIC UNITS - ISVLSI 2017 7

DCT MSE Quantizer Constant multiplication PSNR IDCT Quantizer Encoder R Compression ratio JPEG code

DCT MSE Quantizer Constant multiplication PSNR IDCT Quantizer Encoder R Compression ratio JPEG code Decoder T. AYHAN - A POWER EFFICIENT SYSTEM DESIGN METHODOLOGY EMPLOYING APPROXIMATE ARITHMETIC UNITS - ISVLSI 2017 8

25. 1% PS Exact (c) High Quality: 7. 9% power saving Power Saving: 25.

25. 1% PS Exact (c) High Quality: 7. 9% power saving Power Saving: 25. 1% power saving T. AYHAN - A POWER EFFICIENT SYSTEM DESIGN METHODOLOGY EMPLOYING APPROXIMATE ARITHMETIC UNITS - ISVLSI 2017 9

Tuba Ayhan Poster Session: Tuesday July 4 th, 2017 16: 00 - 17: 00

Tuba Ayhan Poster Session: Tuesday July 4 th, 2017 16: 00 - 17: 00 tuba. ayhan@itu. edu. tr Istanbul Technical University Electronics and Communication Engineering Department Istanbul, Turkey T. AYHAN - A POWER EFFICIENT SYSTEM DESIGN METHODOLOGY EMPLOYING APPROXIMATE ARITHMETIC UNITS - ISVLSI 2017 10

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