William Stallings Computer Organization and Architecture Chapter 10

























- Slides: 25
William Stallings Computer Organization and Architecture Chapter 10 Instruction Sets: Addressing Modes and Formats 1
Addressing Modes z Immediate z Direct z Indirect z Register Indirect z Displacement (Indexed) z Stack 2
Immediate Addressing z Operand is part of instruction z Operand = address field z e. g. ADD 5 y. Add 5 to contents of accumulator y 5 is operand z No memory reference to fetch data z Fast z Limited range 3
Immediate Addressing Diagram Instruction Opcode Operand 4
Direct Addressing z Address field contains address of operand z Effective address (EA) = address field (A) z e. g. ADD A y. Add contents of cell A to accumulator y. Look in memory at address A for operand z Single memory reference to access data z No additional calculations to work out effective address z Limited address space 5
Direct Addressing Diagram Instruction Opcode Address A Memory Operand 6
Indirect Addressing (1) z Memory cell pointed to by address field contains the address of (pointer to) the operand z EA = (A) y. Look in A, find address (A) and look there for operand z e. g. ADD (A) y. Add contents of cell pointed to by contents of A to accumulator 7
Indirect Addressing (2) z Large address space z 2 n where n = word length z May be nested, multilevel, cascaded ye. g. EA = (((A))) x. Draw the diagram yourself z Multiple memory accesses to find operand z Hence slower 8
Indirect Addressing Diagram Instruction Opcode Address A Memory Pointer to operand Operand 9
Register Addressing (1) z Operand is held in register named in address filed z EA = R z Limited number of registers z Very small address field needed y. Shorter instructions y. Faster instruction fetch 10
Register Addressing (2) z No memory access z Very fast execution z Very limited address space z Multiple registers helps performance y. Requires good assembly programming or compiler writing y. N. B. C programming xregister int a; z c. f. Direct addressing 11
Register Addressing Diagram Instruction Opcode Register Address R Registers Operand 12
Register Indirect Addressing z C. f. indirect addressing z EA = (R) z Operand is in memory cell pointed to by contents of register R z Large address space (2 n) z One fewer memory access than indirect addressing 13
Register Indirect Addressing Diagram Instruction Opcode Register Address R Memory Registers Pointer to Operand 14
Displacement Addressing z EA = A + (R) z Address field hold two values y. A = base value y. R = register that holds displacement yor vice versa 15
Displacement Addressing Diagram Instruction Opcode Register R Address A Memory Registers Pointer to Operand + Operand 16
Relative Addressing z A version of displacement addressing z R = Program counter, PC z EA = A + (PC) z i. e. get operand from A cells from current location pointed to by PC z c. f locality of reference & cache usage 17
Base-Register Addressing z A holds displacement z R holds pointer to base address z R may be explicit or implicit z e. g. segment registers in 80 x 86 18
Indexed Addressing z A = base z R = displacement z EA = A + R z Good for accessing arrays y. EA = A + R y. R++ 19
Combinations z Postindex z EA = (A) + (R) z Preindex z EA = (A+(R)) z (Draw the diagrams) 20
Stack Addressing z Operand is (implicitly) on top of stack z e. g. y. ADD Pop two items from stack and add 21
Instruction Formats z Layout of bits in an instruction z Includes opcode z Includes (implicit or explicit) operand(s) z Usually more than one instruction format in an instruction set 22
Instruction Length z Affected by and affects: y. Memory size y. Memory organization y. Bus structure y. CPU complexity y. CPU speed z Trade off between powerful instruction repertoire and saving space 23
Allocation of Bits z Number of addressing modes z Number of operands z Register versus memory z Number of register sets z Address range z Address granularity 24
Foreground Reading z Stallings chapter 10 z Intel and Power. PC Web sites 25