VLSI Communication Systems RECAP VLSI Communication Systems Recap

VLSI Communication Systems RECAP VLSI Communication Systems Recap

CMOS Digital CMOS – MOS circuits: qualitative, quantitative – Gates, flops – Datapath – Memories – Scaling Analog CMOS – Number of basic elements • Diff amp, data converters, multipliers, LNA – Compensate for poor quality process VLSI Communication Systems Recap

Comm Theory Channel Finite bandwidth Multipath Doppler Attenuation Sharing Modulation Multiply carrier(s) BFSK, BPSK, QPSK, OFDM, Spread spectrum Shaping, equalization VLSI Communication Systems Recap

Filtering Spec: pass/stop band, ripple – Many benefits to digital filtering – Can be implemented in many ways FFT – Replaces direct convolution – Various interpretations, best is PVR view – Not competitive for most wireless applications Cordic – Compute sin/cos with very little hardware VLSI Communication Systems Recap

DFGs Data Flow Graph – Represents any “statically schedulable” computation – More than just multiply, add, delay elements • LDPC, FFT, sorting arrays, dep checks, etc. • Even some dynamic computations • Iteration bound VLSI Communication Systems Recap

Generic Optimizations Pipelining – Tradeoff latency for clock speed Retiming – Move flops to even out path delays Unfolding – Parallize to meet IB Folding – Map a DFG with 1000 s of nodes to hardware with 10 s of execution units VLSI Communication Systems Recap

IIR filters Allowing feedback can lead to huge reductions in hardware complexity – Poles can boost frequencies, zeroes can only attenuate them – Essential when doing adaptive filtering Many problems – Pipelining is harder – Numerical issues: stability, limit cycles, etc. Various optimizations – Some to meet IB, some to surpass it – Understanding z-domain critical VLSI Communication Systems Recap

Numeric Strength Reduction Share hardware across different computations – MCM – Ax – Exponentiation – MIMO General algorithm for sub-expression sharing – Look for terms common to two separate computations VLSI Communication Systems Recap

Numerical Issues Coefficient quantization – Use 2 nd order stages Compute the effects of over/underflow, truncation – Analytical approach: state space equations – Simulations Use better architectures – Lattice filters VLSI Communication Systems Recap

ECC Core idea – Add redundancy to recover from errors – FEC vs ARQ Various schemes – Two basic classes: block, convolutional – Differ in terms of number of errors they can recover from, implementation cost Shannon limit Linear Block Codes – G, H matrices – Simple decoding: bit flipping, works well when H is sparse VLSI Communication Systems Recap

What we left out Analog/RF, antenna issues – Better left to specialized classes Comm theory: error probabilities, detailed channel models, timing recovery – Often simulation is more accurate VLSI Signal Processing – Systolic arrays – Fast convolution, algorithmic strength reduction – Bit level arithmetic, redundant arithmetic – Wave pipelining – Low power design – DSPs VLSI Communication Systems Recap