Using Tape Reel for High Volume Flip Chip

Using Tape & Reel for High Volume Flip Chip Delivery: A Manufacturing Analysis Presented at MCC/EIA/SEMATECH KGD Industry Workshop September 19, 1997 Joint Study by: Pat Jones - Delco Electronics Corporation Lisa Bernal Brethour - Surface Mount Taping, Inc. Tom Becker - 3 M Electronic and Interconnect Solutions Division 1 11/1/2020

Presentation Outline • • • Background Test Plan Test Procedure Material Selection Wafer to Tape and Reel Results Transportation Test Results Bump Shape Analysis Spectral Analysis Pick and Place Test Results Conclusions and Recommendations Electronic and Interconnect Solutions Division 2 11/1/2020

Statement of Need • • • Need for low cost /high volume packaging Need to use existing SMT assembly equipment and tooling Need to use standardized embossed packaging media Need for documented research Need for industry standard for high volume flip chip packaging Electronic and Interconnect Solutions Division 3 11/1/2020

Objective • Determine feasibility of using standard embossed tape and reel packaging for flip chip ICs bumps down • Determine functional “range of sizes” of flip chips in standard pockets • Provide design model for sizing embossed pockets to flip chips • Provide research to the semiconductor industry to assist in standardization Electronic and Interconnect Solutions Division 4 11/1/2020

Experimental Scope • Use a range of flip chip sizes • Use a common flip chip thickness • Develop experimental factorial design for chip size vs. pocket size • Use common eutectic bumps with similar metallurgy • Use of standardized FSTM shipping test method • Use of standardized component handling equipment Electronic and Interconnect Solutions Division 5 11/1/2020

Joint Division of Responsibilities Electronic and Interconnect Solutions Division 6 11/1/2020

Process Flow Motorola, SPS Wafers Motorola Bump 3 M Tape & Reel Delco Electronics Wafers Delco Electronics Bump Motorola Wafer to Tape Delco Electronics Test/Assembly Electronic and Interconnect Solutions Division 7 11/1/2020

Flip Chip Description *Bump Metallurgy: Eutectic Sn/Pb 60/40 or 63/37 Electronic and Interconnect Solutions Division 8 11/1/2020

Flip Chip Photos MSFB, 4 -UP MSFB FDIZ 8 mm Tape Photos to scale MFDS 24 mm Tape 12 & 16 mm Tape Electronic and Interconnect Solutions Division 9 11/1/2020

Embossed Carrier Description • • 3 M™ Conductive Polycarbonate Carrier 3000 BD 3 M™ Conductive PSA Cover Tape 2666 Precision Flat-bottom Pockets All pockets (except TC 10) are “worst-case” for bump contact with carrier • Bevel Edge with Raised Cross-bar pocket design . Bevel < 35 deg. Flat-bottom Pocket Bevel at 50% of Ko Bare Die < 3. 0 deg. Draft Angle Inside Corner Electronic and Interconnect Solutions Division 10 11/1/2020

Bevel Edge Pocket Design Low Draft Angles for better containment! (< 5. 0 degrees) Bevel-edge pocket design for ease of use in loading! Precision Flat-Bottom Pocket (+/- 0. 002”) Actual Cross-Section of 3 M CSP Carrier Tape Electronic and Interconnect Solutions Division 11 11/1/2020

Pocket Sizing Factorial Electronic and Interconnect Solutions Division 12 11/1/2020

Wafer-to-Tape Process • 100% visual inspection performed prior to pick manually inked damaged chips • Bumps inspected to Delco Electronics Workmanship Standards • Manually placed control dice in Gel-Pak®, bumps up • Generated vibration samples versus control in tape and reel Gel-Pak® is a product of Vichem Corporation Electronic and Interconnect Solutions Division 13 11/1/2020

Wafer-to-Tape Equipment Electronic and Interconnect Solutions Division 14 11/1/2020

Wafer-to-Tape • Saw street variation from wafer-to-wafer affected system alignment • Initial tape designs were difficult to seal, re-designed tape to resolve problem • Vacuum tip needed re-design to pick up bumped die reliably Electronic and Interconnect Solutions Division 15 11/1/2020

Wafer-to-Tape Results Electronic and Interconnect Solutions Division 16 11/1/2020

Packaging and Shipping Method • Partially filled 13” reels • Anti-static bags • Placed in primary shipping container (pizza box) with anti-static bubble wrap • Placed in secondary shipping container with anti-static bubble wrap • Shipped UPS Red - Tempe, AZ to Kokomo, IN Electronic and Interconnect Solutions Division 17 11/1/2020

Delco Electronics Test Flow Inspect 40 Die for Bump Damage Tape Sample 1 A 50 die - Control Tape Sample 1 B 450 Die - Test Gel-Pak® control samples Shipping Test Inspect carrier pockets Measure 10 Die for Flatness Photograph typical and atypical damage Pick & Place 400 die Collect rotation data Spectral Analysis 5 die Collect mis-pick data Reflow % of Die Cold Joint Analysis Electronic and Interconnect Solutions Division 18 11/1/2020

Shipping Test • Federal Standard Test Method 101 C: • Vibration Method 5019. 1 – Vibrate on 3 sides - one hour each – 0. 5” unrestrained vertical movement • Drop Test Method 5007. 1 – Level B, procedures b, c and f – 27” drop height Electronic and Interconnect Solutions Division 19 11/1/2020

FDIZ Bump Photos Control Gel-Pak® Control Tape & Reel Test Sample SEM Photos Electronic and Interconnect Solutions Division 20 11/1/2020

MSFB Bump Photos Control Gel-Pak® Control Tape & Reel Test Sample SEM Photos Electronic and Interconnect Solutions Division 21 11/1/2020

MSFB 4 UP Bump Photos Control Gel-Pak® Control Tape & Reel Test Sample SEM Photos Electronic and Interconnect Solutions Division 22 11/1/2020

FB 250 Bump Photos Control Gel-Pak® Control Tape & Reel Test Sample SEM Photos Electronic and Interconnect Solutions Division 23 11/1/2020

Bump Height Statistical Analysis • Using computerized optical measuring system – Repeatable to 2. 5 um – Analysis of mid-size FB 250 bumps • Analyzed bump heights and flatness • Average and sigma Electronic and Interconnect Solutions Division 24 11/1/2020

Bump Heights - Average Electronic and Interconnect Solutions Division 25 11/1/2020

Bump Heights - Sigma Electronic and Interconnect Solutions Division 26 11/1/2020

Bump Spectral Analysis Uncontaminated Contaminated Out of 50 flip chips analyzed with 48 bumps each (2, 400 bumps), only this small particulate of contamination was detected during spectral analysis. Electronic and Interconnect Solutions Division 27 11/1/2020

Substrate Assembly Process • SMD equipment with standard feeders (blind pick!) • Data collection – Rotation of flip chips in pockets – Mis-pick information • Reflow on test PCBs • Comparison of modules with control vs. tested flip chips Electronic and Interconnect Solutions Division 28 11/1/2020

Pick and Place Test Results *P&P #1 vacuum chuck was not optimized for small die and had difficulty picking up the FDIZ components. *P&P #2 vision system was not optimized for large components and had difficulty “seeing” the large components. Electronic and Interconnect Solutions Division 29 11/1/2020

Conclusions and Recommendations • Use of standardized embossed tape & reel solves high volume/low cost transportation needs • Must limit die movement to < 10 degrees to prevent die damage • Carrier should be cleaned prior to use • Existing SMT placement equipment is capable of blind picking flip chips from carrier tapes Electronic and Interconnect Solutions Division 30 11/1/2020

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