US CMS Tri DAS US CMS Meeting Wesley

US CMS Tri. DAS US CMS Meeting Wesley H. Smith, U. Wisconsin CMS Trigger Project Manager May 10, 2002 Outline: Calorimeter Trigger Status & Plans Muon Trigger Status & Plans DAQ Status & Plans (from Vivian O’Dell) This talk is available on: http: //hep. wisc. edu/wsmith/cms/Tri. DAS_USCMS_0502. pdf W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 1

L 1 Trigger Hardware Overview US CMS Trigger (this talk) US CMS W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 2

Calorimeter Trig. Overview W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 3

Cal. Trig 2 nd Gen. Prototypes (U. Wisconsin) New High-Speed Backplane VME Slots Front • 160 MHz with 0. 4 Tbit/sec dataflow • Designed to incorporate algorithm changes • New Non-Isolated Electron, Tau & Jet Triggers DC-DC Converters New Clock & Control Card Rear DC-DC Conv • Fans out 160 MHz clock & adjusts phases for all boards • 50% tested successfully W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS Clock delay adjust 4

New Cal. Trig. 4 Gbaud Copper Link Cards & Tester (U. Wisconsin) 8 Compact Mezzanine Cards for each Receiver Card accept 4 x 20 m 1. 2 -Gbaud copper pairs transmitting 2 cal. tower energies every 25 ns with low cost & power. Uses new Vitesse Link Chips (7216 -01). New Serial Link Test Card Status: under test W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 5

New Calorimeter Trigger Receiver Card (U. Wisconsin) Full featured final prototype board is in test - initial results are good. Continue to test on-board ASICs & copper link mezzanine cards Adder PHASE ASICs mezz link cards BSCAN ASICs MLUs DC-DC Top side with 1 of 8 mezzanine cards & 2 of 3 Adder ASICs Bottom side with all Phase & Boundary Scan ASICs W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 6

Cal. Trig. New Electron Isolation & Jet/Summary Cards (Wisconsin) Full featured final E. I. Proto. board is finished & ready for testing. EISO SORT ASICs JSC Proto. ready to build pending tests of other boards EISO W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS E. I. Proto will test Electron Isolation ASICs & Sort ASICs 7

Cal Trigger Status/Plans Preparing second generation prototype tests • Crate, Backplane, Clock & Control, ASICs done • Receiver Card & Electron Isolation Card ready. • Serial Link Mezzanine Card Receiver done, Tester Card at vendor, Transmitter Tester in design Goals for 2002 • Complete of prototype tests, validate ASICs • Integrate Serial Links w/ECAL, HCAL front-ends • Prototype Jet/Summary card manufacture • Ready for manufacture -- waiting for other board tests • Finalize Jet Cluster crate design W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 8

CSC Muon Trigger Scheme On-Chamber Trigger Primitives Trigger Motherboard (UCLA) Strip FE cards 3 -D Track-Finding and Measurement Muon Port Card (Rice) LCT Sector Receiver/ Processor (U. Florida) OPTICAL FE SR/SP MPC LCT 3 / port card TMB FE SP 2 / chamber Wire LCT card Wire FE cards RIM RPC Interface Module Combination of all 3 Muon Systems 3 / sector In counting house RPC 4 CSC Muon Sorter (Rice) DT 4 4 Global Trigger W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 4 Global L 1 9

1 st Muon Trigger Prototypes (Florida, Rice, UCLA) Successful CSC Trigger Integration test • Prototype Muon Port Card, Sector Receiver, Sector Processor, Clock Board, Backplane work & communicate -- Result in 2000 ORCA full simulation working • Agreement/use with hardware test W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 10

1 st Track-Finder Crate Tests Sector Processor (Florida) Sector Receiver Clock Control (UCLA) Board (Rice) Bit 3 VME Interface Custom Backplane (Florida) Prototype crate for original six crate design W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS Muon Port Card (Rice) Very successful but latency too high -New design in 2001 100 m optical fibers 11

New EMU Trigger Design: U. Florida Track-Finder Muon Sorter SR SR SR / / / SP SP SP MS CCB Clock and Control Board BIT 3 Controller Single Track-Finder Crate Design with 1. 6 Gbit/s optical links SR SR SR / / / SP SP SP From Trigger Timing & Control SR/SP Card (3 Sector Receivers + Sector Processor) (60° sector) From MPC (chamber 4) From MPC (chamber 3) From MPC (chamber 2) From MPC (chamber 1 B) From MPC (chamber 1 A) To Global Trigger To DAQ • Reduces processing time from 525 ns (old design) to 175 ns • Total Latency ~ 20 Bx (from input of SR/SP card to output of MS card) • Crate Power Consumption ~ 500 W • 15 Optical connections per SR/SP card • Custom Backplane for SR/SP CCB and MS connection W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 12

New Muon Port Card Design & Optical Link Tests (Rice) New MPC Design uses new high speed links (TLK 2501) to send one muon per optical fiber (needed for new compact track-finder design) 9 U * 400 MM BOARD VME INTERFACE CCB INTERFACE 3 OPTICAL CABLES TO SECTOR PROCESSOR OPTICAL TRANSCEIVERS OPTO SER SORTER LOGIC OPTO SER SERIALIZERS INPUT AND OUTPUT FIFO VME J 1 CONNECTOR TMB_1 TMB_2 CUSTOM TMB_3 PERIPHERAL TMB_4 BACKPLANE TMB_5 TMB_6 TMB_7 TMB_8 FPGA TMB_9 GTLP TRANSCEIVERS Optical Link Radiation Tests: Three serializers: up to 270 k. Rad TID. No permanent damage or SEU Two Finisar optical modules: No errors up to 70 k. Rad. Failed at 70 k. Rad (well above ~10 k. Rad TID inner CSC dose for 10 years) W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 13

CSC Trigger Status/Plans Prototype 1 tests now complete Prototype 2 and production follow EMU components to optimize technology MPC, SP, CCC modules, backplane* milestones: • Apr-02 Prototype 2 designs done • Freeze CSC-DT interface • Determine DDU compatibility with OSU module for EMU • Nov-02 Prototype 2 construction done • Apr-03 Prototype 2 testing done • Sep-03 Final designs done • Oct-04 Production done • Apr-05 Installation done (*backplane schedule ~3 months ahead of above dates to provide platform for testing and integration) Muon Sorter module: only 1, design by Jan-04 W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 14

Schedule: Trigger Project Completion Installation in Underground Counting Room • Expect access by March ‘ 05 • Sufficient time for installation and some testing but not for completing commissioning with detectors Slice Test (on surface) Underground Counting Room With both HCAL and EMU Verify trigger functions and interfaces by testing with detectors on surface at CERN. Suggest as substitute for commissioning completion step. Will check as much on surface before gaining access to underground facilities. Planned for October ‘ 04 - March ‘ 05 W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 15

Original Trigger L 2 Task Schedule & Updates Tasks • • • original start Produce TDR 8/00 12/00 Design Final Prototypes 11/00 Construct Final Prototypes Test/Integrate Final Prototypes Pre-Production Design & Test Production 12/02 6/04 Production Test 6/03 11/04 Trigger System Tests 5/04 "Slice Test" NEW 10/04 Trigger Installation 3/05 Integration & Test w/DAQ & FE Maintenance & Operations finish new 4 12/01 6/01 12/01 6/02 4 6/02 12/02 6/03 5/05 3/05 9/05 6/05 10/04 12/05 ------- 11/02 4/03 11/03 6 months civil engineering delay of installation date W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 16

DAQ System Overview 40 MHz COLLISION RATE LEVEL-1 TRIGGER DETECTOR CHANNELS Charge Time Pattern 75 k. Hz 1 Terabit/s READOUT 50, 000 data channels 16 Million channels 3 Gigacell buffers Energy Tracks 1 MB EVENT DATA 200 GB buffers ~ 400 Readout memories EVENT BUILDER. 500 Gigabit/s SWITCH NETWORK 100 Hz FILTERED EVENT A large switching network (400+400 ports) with total throughput ~ 400 Gbit/s forms the interconnection between the sources (deep buffers) and the destinations (buffers before farm CPUs). ~ 400 CPU farms EVENT FILTER. A set of high performance commercial processors organized into many farms convenient for on-line and off-line applications. 5 Tera. Flps Computing Services Gigabit/s Petabyte ARCHIVE Original design: L-1 @ 100 k. Hz Rescope: 1997: 75 k. Hz 2001: Initial L-1 @ 50 k. Hz But design all elements to be able to do 100 k. Hz SERVICE LAN W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 17

New DAQ design: principle Basic principle: • Break DAQ into a number of functionally identical, parallel, smaller DAQ systems • A 64 x 64 system is feasible today W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 18

Detector readout to surface W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 19

Event Filter Readout Builder Data to Surface D 2 S + RB + EF breakdown W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 20

DAQ: US contribution (old) US: Event Manager + Builder Units Level 1 Trigger Event Manager Detector Front-end Readout Systems Run Control Builder Networks US Builder and Filter Systems Computing Services BU FU Filter Units not included in “outputs” CERN: Inputs(500) + Switch US: Outputs+ EVM Other responsibilities: Detector Front-Ends: detector groups Computing Services: infrastructure W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 21

US contribution: new Cover one segment (1/8) of the CMS DAQ plus ¼ of the Data-to-Surface system (plus the associated prototypes – “preseries”) • Segment: 1 Readout Builder + 1 Event Filter • US_CMS detector electronics is ~1/4 of the total • Delivery of the system can be accomplished by the end of the US_CMS project (FY 05) • Aids the experiment most in the current phase where cash flow is very tight • US R&D program can remain ~ unchanged (to the extent that the basic modules are the same) Roughly speaking, the US (a) works on/delivers prototype system (to 2004) (b) delivers the “startup DAQ” for CMS (2005) W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 22

Milestones* Prototype DAQ (US Contribution) D 2 S Prototype “Slice Test” Readout Builder Prototype July, 2004 November, 2004 (*) April, 2005 Startup DAQ (US Contribution) Filter Farm Ready Readout Builder Ready May, 2006 August, 2006 Declaration of Completion (US Contribution) Startup DAQ ready for beam September, 2006 (*) “Slice” Test for US-CMS detectors – DAQ will have full D 2 S proto + a few RB elements *(Version 33) W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 23

Slice Test DAQ (10 -100 Hz) Trigger system Detector readout Readout Units Data to Surface RCN, BDN networks Event manager Builder/Filter Units Performances GTP, TTC and s. TTS Complete FED crate systems (FED-TTC-TTS, Controller CPU+DSN) XDAQ RU-VME-tasks running in all the FED controllers None just the FED-VME bus of FED crates DAQ Service Network (DSN e. g. GEthernet) XDAQ EVM-task running in the GTP controller XDAQ BU-task running in any DSN(WAN) CPU Few 10 Hz (up to 100 s when using GE switches in DSN as EVB) W. Smith, U. Wisconsin, US CMS Collaboration Meeting, May 10, 2002: Tri. DAS 24