TSD160 Introduction to Network Analyzers and Error Correction

TSD-160 Introduction to Network Analyzers and Error Correction Doug Rytting 4804 Westminster Place Santa Rosa, CA 95405 707 -539 -1631 rytting@sbcglobal. net

Agenda • Block Diagram • Improvements with Error Correction • 3 -Term Error Model • 12 -Term Error Model • 16 -Term Error Model • 8 -Term Error Model • Switch Correction • Miltiport Error Model • Accuracy of Error Correction

Network Analyzer Block Diagram 3

Improvement with Correction 4

Improvement with Correction 5

Improvement with Correction 6

One Port: 3 -Term Error Model 7

One Port: 3 -Term Error Model 8

12 -Term Error Model 9

12 -Term Error Model 10

12 -Term Error Model 11

12 -Term Error Model 12

12 -Term Error Model 13

12 -Term Error Model 14

16 -Term Error Model 15

16 -Term Error Model 16

16 -Term Error Model 17

8 -Term Error Model 18

8 -Term Error Model 19

8 -Term Error Model 20

8 -Term Error Model 21

8 -Term Error Model 22

8 -Term Calibration Examples 23

Switch Correction 24

Switch Correction 25

Multiport Error Model 26

Accuracy of Error Correction 27

Accuracy of Error Correction APC-7 (7 mm Coax) at 18 GHz Residual OSL Errors Directivity d Match m OSL Fixed Load Sliding Load TRL TRM -40 d. B -52 d. B -60 d. B -40 d. B -35 d. B -41 d. B -60 d. B -40 d. B ±. 1 d. B ±. 05 d. B ±. 01 d. B Reflection Tracking t 28

Accuracy of Error Correction 29

Accuracy of Error Correction 30

Vector Network Analyzer References 31

Doug Rytting Biography 32