Translator Structure Cw Code AST Structure Input Lexer

![Translation example (Actual Translation) { vector int a[100][8], b[100], c[100][8]; c[: ] = a[: Translation example (Actual Translation) { vector int a[100][8], b[100], c[100][8]; c[: ] = a[:](https://slidetodoc.com/presentation_image_h2/3f762ba54c8994099c571e432811d669/image-2.jpg)
![Simplified Step { vector int a[100][8], b[100], c[100][8]; c[: ] = a[: ] + Simplified Step { vector int a[100][8], b[100], c[100][8]; c[: ] = a[: ] +](https://slidetodoc.com/presentation_image_h2/3f762ba54c8994099c571e432811d669/image-3.jpg)
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Translator Structure Cw Code AST Structure Input Lexer Parser Uses Intrinsics in Canonical Format Expression Binary. Expression Unary. Expression Declaration Function Statement If. Statement. . Translation. Unit Var. Declaration Identifier Output: AST Function. Definition Variable. Declaration Driver Compound-Statement . . Intrinsic Emitter Load Intrinsics Store Intrinsics Binary. Operator Intrinsics. . Other passes in the future Cw Translation Pass Translated AST Final Output
Translation example (Actual Translation) { vector int a[100][8], b[100], c[100][8]; c[: ] = a[: ] + b[: ]; } { int a[100][8], b[100], c[100][8]; vec 4 x 32 **p_vec_a = (vec 4 x 32**)a; vec 4 x 32 *p_vec_b = (vec 4 x 32*)b; vec 4 x 32 **p_vec_c = (vec 4 x 32**)c; for( cw_i 0 = 0; cw_i 0 < 100; cw_i 0++){ for( cw_i 1 = 0; cw_i 1 < 8/4; cw_i 1++){ vec 4 x 32 vec_a; vec 4 x 32 vec_b; vec_a = vec 4 x 32 Load(p_vec_a[cw_i 0] + cw_i 1); vec_b = vec 4 x 32 Load(p_vec_b + cw_i 1); vec_a = vec 4 x 32 Add(vec_a, vec_b); vec 4 x 32 Store(p_vec_c[cw_i 0] + cw_i 1, vec_a); } } }
Simplified Step { vector int a[100][8], b[100], c[100][8]; c[: ] = a[: ] + b[: ]; } • Collect vector symbols – a, b, c • Find Assignment Expressions that involve vector symbols – exp = exp • Check LHS if it is Array-Access expression – Identifier[exp]. . . • Check types of LHS and RHS to know declared array size, dimension – RHS traverses sub-expressions until it reaches Identifier – Identifier lookup symbol table to find out declared types • • • Traverse up ancestor ASTNodes until it finds the Symbol. Table containing matching symbol compute dimension and type Translate RHS – Translate Sub-expressions first • Translation of sub-expression returns vector identifier presented in the innermost for-loop (vec_a, vec_b. . ) – Translating Array. Access • • • Declare pointer variable for base of array-access Add pointer specifier as many as num-dimension of declared symbol Create for-loop nested as many as num-dimensions of declared symbol Put LOAD intrinsic in the innermost loop Translate Assignment Expression – put store intrinsics at the end of innermost for-loop body, which is created during RHS translation