The Topological Structure of Asynchronous Computability Nir Shavit

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The Topological Structure of Asynchronous Computability Nir Shavit Tel-Aviv University and Sun Microsystems Labs

The Topological Structure of Asynchronous Computability Nir Shavit Tel-Aviv University and Sun Microsystems Labs (Joint work with Maurice Herlihy of Brown University) © Herlihy and Shavit 2004 1

From the New York Times … May 7 th, 2004 – “Intel said on

From the New York Times … May 7 th, 2004 – “Intel said on Friday that it was scrapping its development of two microprocessors, a move that is a shift in the company's business strategy…. ” May 8 th, 2004 – “Intel … [has] decided to focus its development efforts on “dual core” processors …. with two engines instead of one, allowing for greater efficiency because the processor workload is essentially shared. ” 2

The Future of Computing § Speeding up uniprocessors is harder and harder § Intel,

The Future of Computing § Speeding up uniprocessors is harder and harder § Intel, Sun, AMD, now focusing on “multi-core” architectures § Soon, every computer will be a multiprocessor 3

What has this got to do with theory? Alan Mathison Turing. Forefather of Computer

What has this got to do with theory? Alan Mathison Turing. Forefather of Computer Science. Inventor of the Turing Machine. 4

1936 - Turing Computability Turing-Machine f r # a r a zrw 4 p

1936 - Turing Computability Turing-Machine f r # a r a zrw 4 p t l r s r 0 1 g a k 0 3 0 A mathematical model that captures what is and is not computable on uniprocessors… 5

Time and Asynchrony “Time is Nature’s way of making sure that everything doesn’t happen

Time and Asynchrony “Time is Nature’s way of making sure that everything doesn’t happen all at once. ” (Anonymous, circa 1970) Real world asynchrony: no “clock in the sky” 6

Asynchronous Computability 10011 Shared Memory/Network A mathematical model capturing what is and is not

Asynchronous Computability 10011 Shared Memory/Network A mathematical model capturing what is and is not computable by multiple processors in an asynchronous environment 7

Asynchrony Complicates Life Synchrony Asynchrony A single execution A multitude of concurrent executions Seek

Asynchrony Complicates Life Synchrony Asynchrony A single execution A multitude of concurrent executions Seek help from modern mathematics! 8

FLP § Fischer Lynch and Paterson § Showed that Asynchronous computability ≠ Turing computability

FLP § Fischer Lynch and Paterson § Showed that Asynchronous computability ≠ Turing computability § Consensus • Trivial in uniprocessor • Impossible with 1 asynchronous failure § Reasoned directly about executions 9

Graph Theory § Biran, Moran, Zachs 1988 § Single asynchronous failure § Coordination problem

Graph Theory § Biran, Moran, Zachs 1988 § Single asynchronous failure § Coordination problem • is a graph § Problem is asynchronously computable • iff graph is connected 10

More Graph Theory § Fischer Lynch 82, Dolev Strong 83, Merritt 85, Dwork Moses

More Graph Theory § Fischer Lynch 82, Dolev Strong 83, Merritt 85, Dwork Moses 90, … § Synchronous crash failures § Computation state • is a graph § Consensus not computable • while graph is connected 11

Limitations of Graph Theory § Asynchronous model • Multiple failures? § Synchronous model •

Limitations of Graph Theory § Asynchronous model • Multiple failures? § Synchronous model • Problems beyond consensus? § Need a more general notion of connectivity 12

The Topological Approach § § Borowsky Gafni STOC 93 Herlihy Shavit STOC 93, JACM

The Topological Approach § § Borowsky Gafni STOC 93 Herlihy Shavit STOC 93, JACM 1999 Saks Zaharoglou STOC 93, SICOMP 2000 Showed k-set agreement impossible § Generalization of consensus [Chaudhuri 90] § Open problem for several years 13

The Topological Approach § Computations as geometric objects § Use topological methods to show

The Topological Approach § Computations as geometric objects § Use topological methods to show existence of “bad” executions. § Borowsky & Gafni § Sperner’s Lemma § Herlihy & Shavit § Simplicial complexes & homology § Saks & Zaharoglou § Brouwer’s fixed-point theorem 14

Example: Autonomous Air-Traffic Control 36, 000 f t DL 227 35, 000 f t

Example: Autonomous Air-Traffic Control 36, 000 f t DL 227 35, 000 f t 34, 000 f t 33, 000 f t AL 991 32, 000 f t AA 082 31, 000 f t Pick your own altitude. How many slots do we need to allow safe coordination? 15

Renaming § Process has input name (flight #) § Must generate output name (altitude)

Renaming § Process has input name (flight #) § Must generate output name (altitude) § Interested in comparison-based protocols: • Equality: A=B? • Order: A<B? • Nothing else (rules out trivial solutions) 16

History § Proposed by Attiya, Bar-Noy, Dolev, Peleg, and Reischuk § They showed •

History § Proposed by Attiya, Bar-Noy, Dolev, Peleg, and Reischuk § They showed • Solution for 2 n-1 names • Impossibility for n+1 names • Intermediate values? § Long-standing open problem … • Topological methods finally showed … • Intermediate values also impossible 17

A Vertex Point in high-dimensional Euclidean Space 18

A Vertex Point in high-dimensional Euclidean Space 18

Simplexes n o i s en 2 m i D 3 solid tetrahedron 1

Simplexes n o i s en 2 m i D 3 solid tetrahedron 1 solid triangle 0 line point 19

Complexes Glue simplexes to form complexes 20

Complexes Glue simplexes to form complexes 20

A Cycle OK to think of it as oriented path Also works in higher

A Cycle OK to think of it as oriented path Also works in higher dimensions 21

A Boundry A cycle is a boundry if it goes around a “solid” region

A Boundry A cycle is a boundry if it goes around a “solid” region Encompases no holes 22

Not Every Cycle is a Boundry Goes around a hole 23

Not Every Cycle is a Boundry Goes around a hole 23

Connectivity § A complex is n-connected if § Every cycle of dimension n or

Connectivity § A complex is n-connected if § Every cycle of dimension n or less § Is also a boundary § No “holes” in any dimension § Fundamental group is trivial § Higher homology groups trivial 24

Chromatic Complexes Each (n-1)-simplex colored by n distinct colors Corresponding to process ids 25

Chromatic Complexes Each (n-1)-simplex colored by n distinct colors Corresponding to process ids 25

Chromatic Simplicial Map Color-preserving vertex-to-vertex map That also carries simplexes to simplexes 26

Chromatic Simplicial Map Color-preserving vertex-to-vertex map That also carries simplexes to simplexes 26

Chromatic Simplicial Maps Preserve Connectivity Cannot map boundries around holes 27

Chromatic Simplicial Maps Preserve Connectivity Cannot map boundries around holes 27

Vertex = Process State Process id (color) 2 Value (input or output) 28

Vertex = Process State Process id (color) 2 Value (input or output) 28

Simplex = Global State 1 1 2 2 3 3 29

Simplex = Global State 1 1 2 2 3 3 29

Complex = Global States 4 4 1 1 2 3 30

Complex = Global States 4 4 1 1 2 3 30

A Decision Task 2 Planes, 2 Slots input complex (all possible flights) output complex

A Decision Task 2 Planes, 2 Slots input complex (all possible flights) output complex (all consistent slot choices) Task spec relation 1 2 2 1 AL 991 AA 082 31

3 Planes, 3 Slots output complex input complex 1 AL 991 2 3 1

3 Planes, 3 Slots output complex input complex 1 AL 991 2 3 1 1 DL 227 AA 082 2 3 P, 6 1 1 3 2 1 32

3 Planes, 4 Slots input complex output complex 3 1 2 3 R 1

3 Planes, 4 Slots input complex output complex 3 1 2 3 R 1 2 4 2 1 3 3 1 4 4 1 2 3 4 1 4 24 3 4 2 1 1 3 2 4 21 1 33

Shared Memory Computation § Asynchronous § arbitrary delays § e. g. , interrupts, page

Shared Memory Computation § Asynchronous § arbitrary delays § e. g. , interrupts, page faults, etc. § Wait-free § Processes can fail or be slow § Communication by reading and writing shared memory 34

Asynchronous Computability Theorem task spec Input complex output complex Simplicial map A task has

Asynchronous Computability Theorem task spec Input complex output complex Simplicial map A task has a wait-free solution if and only if one can chromatically subdivide its input complex so that there exists a chromatic simplicial map to its output complex that refines the task specification map. 35

Asynchrony and Continuity 1 AL 112 AL 991: post(1) look() decide (1 , )

Asynchrony and Continuity 1 AL 112 AL 991: post(1) look() decide (1 , ) AA 081 2 Houston, we have a problem… (1 , 1 ) AA 082: post(1) look() decide ( , 1) d decide 11 2? 11 If there were a continuous map…problem goes away 36

Three Process Protocol Complex DL 227 runs solo (Some simplexes omitted for clarity) AA

Three Process Protocol Complex DL 227 runs solo (Some simplexes omitted for clarity) AA 081 and AL 112 run solo 37

In General d Protocol complex AL 991 2 R Task def 3 1 4

In General d Protocol complex AL 991 2 R Task def 3 1 4 Input complex 2 4 DL 227 AA 082 3 1 4 4 3 2 1 Output complex 38

2 Plane 3 Slot Renaming P, 3 Q, 2 Q, 1 P, 1 If

2 Plane 3 Slot Renaming P, 3 Q, 2 Q, 1 P, 1 If view = (my_id, ) decide 1 else if my_id < his_id decide 2 else decide 3 P, 2 Q, 3 simplicial map P Q Q P single chromatic subdivision of input complex A comparison based algorthm: only compares planes ids. 39

3 Planes 4 Slots § Impossibility by reduction § Assume a protocol for 3

3 Planes 4 Slots § Impossibility by reduction § Assume a protocol for 3 airplanes, 4 slots § Choose § 0 if your name is even § 1 if your name is odd § Result § Not all odd § Not all even 40

Output Complex (3 processes) 1 0 0 0 1 1 41

Output Complex (3 processes) 1 0 0 0 1 1 41

Protocol Complex (schematic) 42

Protocol Complex (schematic) 42

Boundary = 2 -Process Executions 43

Boundary = 2 -Process Executions 43

Protocol Complex for One Process Execution P( ) decides 1 WLOG P( ) decides

Protocol Complex for One Process Execution P( ) decides 1 WLOG P( ) decides 1 by symmetry 44

2 -Process execution might be mapped this way … boundary protocol Wraps around -1

2 -Process execution might be mapped this way … boundary protocol Wraps around -1 times output 45

2 -Process execution might be mapped that way … boundary protocol Wraps around +2

2 -Process execution might be mapped that way … boundary protocol Wraps around +2 times output 46

In general … boundary protocol Wraps around hole 3 k-1 ≠ 0 times output

In general … boundary protocol Wraps around hole 3 k-1 ≠ 0 times output 47

But a Simplicial Cannot Map a Boundary Around a Hole…QED! Hole is an obstruction

But a Simplicial Cannot Map a Boundary Around a Hole…QED! Hole is an obstruction 48

So 3 Planes Need At Least 5 Slots! DL 227 35, 000 f t

So 3 Planes Need At Least 5 Slots! DL 227 35, 000 f t 34, 000 f t 33, 000 f t AL 991 32, 000 f t AA 082 31, 000 f t 49

The Power of the Asynchronous Computability Theorem Asynchrony Concurrency Arguments about geometric objects A

The Power of the Asynchronous Computability Theorem Asynchrony Concurrency Arguments about geometric objects A multitude of concurrent executions Topological Representation 50

The Glorious Future § Our work • Asynchronous, wait-free, one-shot, RW memory § Open

The Glorious Future § Our work • Asynchronous, wait-free, one-shot, RW memory § Open problems • • Long-lived computations Other kinds of memory (compare&swap) Randomization Other progress conditions … 51