THE INVERTERS Digital Integrated Circuits Inverter Prentice Hall
- Slides: 67
THE INVERTERS Digital Integrated Circuits Inverter © Prentice Hall 1995
DIGITAL GATES Fundamental Parameters l l Functionality Reliability, Robustness Area Performance » Speed (delay) » Power Consumption » Energy Digital Integrated Circuits Inverter © Prentice Hall 1995
Noise in Digital Integrated Circuits Inverter © Prentice Hall 1995
DC Operation: Voltage Transfer Characteristic Digital Integrated Circuits Inverter © Prentice Hall 1995
Mapping between analog and digital signals Digital Integrated Circuits Inverter © Prentice Hall 1995
Definition of Noise Margins Digital Integrated Circuits Inverter © Prentice Hall 1995
The Regenerative Property Digital Integrated Circuits Inverter © Prentice Hall 1995
Fan-in and Fan-out Digital Integrated Circuits Inverter © Prentice Hall 1995
The Ideal Gate Digital Integrated Circuits Inverter © Prentice Hall 1995
VTC of Real Inverter Digital Integrated Circuits Inverter © Prentice Hall 1995
Delay Definitions Digital Integrated Circuits Inverter © Prentice Hall 1995
Ring Oscillator Digital Integrated Circuits Inverter © Prentice Hall 1995
Power Dissipation Digital Integrated Circuits Inverter © Prentice Hall 1995
CMOS INVERTER Digital Integrated Circuits Inverter © Prentice Hall 1995
The CMOS Inverter: A First Glance Digital Integrated Circuits Inverter © Prentice Hall 1995
CMOS Inverters VDD PMOS 1. 2 mm =2 l Out In Metal 1 Polysilicon NMOS GND Digital Integrated Circuits Inverter © Prentice Hall 1995
Switch Model of CMOS Transistor Digital Integrated Circuits Inverter © Prentice Hall 1995
CMOS Inverter: Steady State Response Digital Integrated Circuits Inverter © Prentice Hall 1995
CMOS Inverter: Transient Response Digital Integrated Circuits Inverter © Prentice Hall 1995
CMOS Properties l l l Full rail-to-rail swing Symmetrical VTC Propagation delay function of load capacitance and resistance of transistors No static power dissipation Direct path current during switching Digital Integrated Circuits Inverter © Prentice Hall 1995
Voltage Transfer Characteristic Digital Integrated Circuits Inverter © Prentice Hall 1995
PMOS Load Lines IDn V in = VDD -VGSp IDn = - IDp V out = VDD -VDSp Vout IDp Vin=0 IDn Vin=3 VGSp=-2 VGSp=-5 Digital Integrated Circuits V DSp Vin=3 VDSp Vin = VDD-VGSp IDn = - IDp Inverter Vin=0 Vout = V DD-VDSp © Prentice Hall 1995
CMOS Inverter Load Characteristics Digital Integrated Circuits Inverter © Prentice Hall 1995
CMOS Inverter VTC Digital Integrated Circuits Inverter © Prentice Hall 1995
Simulated VTC Digital Integrated Circuits Inverter © Prentice Hall 1995
Gate Switching Threshold Digital Integrated Circuits Inverter © Prentice Hall 1995
MOS Transistor Small Signal Model Digital Integrated Circuits Inverter © Prentice Hall 1995
Determining VIH and VIL Digital Integrated Circuits Inverter © Prentice Hall 1995
Propagation Delay Digital Integrated Circuits Inverter © Prentice Hall 1995
CMOS Inverter: Transient Response Digital Integrated Circuits Inverter © Prentice Hall 1995
CMOS Inverter Propagation Delay Digital Integrated Circuits Inverter © Prentice Hall 1995
Computing the Capacitances Digital Integrated Circuits Inverter © Prentice Hall 1995
CMOS Inverters VDD PMOS 1. 2 mm =2 l Out In Metal 1 Polysilicon NMOS GND Digital Integrated Circuits Inverter © Prentice Hall 1995
The Miller Effect Digital Integrated Circuits Inverter © Prentice Hall 1995
Computing the Capacitances Digital Integrated Circuits Inverter © Prentice Hall 1995
Impact of Rise Time on Delay Digital Integrated Circuits Inverter © Prentice Hall 1995
Delay as a function of VDD Digital Integrated Circuits Inverter © Prentice Hall 1995
Where Does Power Go in CMOS? Digital Integrated Circuits Inverter © Prentice Hall 1995
Dynamic Power Dissipation Vdd Vin Vout CL Energy/transition = CL * Vdd 2 Power = Energy/transition * f = CL * Vdd 2 * f Not a function of transistor sizes! Need to reduce CL, Vdd, and f to reduce power. Digital Integrated Circuits Inverter © Prentice Hall 1995
Impact of Technology Scaling Digital Integrated Circuits Inverter © Prentice Hall 1995
Technology Evolution Digital Integrated Circuits Inverter © Prentice Hall 1995
Technology Scaling (1) Minimum Feature Size Digital Integrated Circuits Inverter © Prentice Hall 1995
Technology Scaling (2) Number of components per chip Digital Integrated Circuits Inverter © Prentice Hall 1995
Propagation Delay Scaling Digital Integrated Circuits Inverter © Prentice Hall 1995
Technology Scaling Models Digital Integrated Circuits Inverter © Prentice Hall 1995
Scaling Relationships for Long Channel Devices Digital Integrated Circuits Inverter © Prentice Hall 1995
Scaling of Short Channel Devices Digital Integrated Circuits Inverter © Prentice Hall 1995
BIPOLAR INVERTERS Digital Integrated Circuits Inverter © Prentice Hall 1995
Resistor-Transistor Logic Digital Integrated Circuits Inverter © Prentice Hall 1995
VTC of RTL Inverter VOH is function of fan-out Digital Integrated Circuits Inverter © Prentice Hall 1995
Transient Response of RTL Inverter Digital Integrated Circuits Inverter © Prentice Hall 1995
The ECL Gate at a Glance Core of gate: The differential pair or “current switch” Digital Integrated Circuits Inverter © Prentice Hall 1995
Single-ended versus Differential Logic Single-ended Digital Integrated Circuits Differential Inverter © Prentice Hall 1995
Complete ECL Gate Emitter-follower output driver Digital Integrated Circuits Inverter © Prentice Hall 1995
The Bias Network Issues: • Temperature variations • Device variations Digital Integrated Circuits Inverter © Prentice Hall 1995
Photomicrograph of early ECL Gate (1967) Digital Integrated Circuits Inverter © Prentice Hall 1995
ECL VTC Digital Integrated Circuits Inverter © Prentice Hall 1995
ECL VTC Vswing = IEE RC Digital Integrated Circuits Inverter © Prentice Hall 1995
Simulated VTC of ECL Gate Digital Integrated Circuits Inverter © Prentice Hall 1995
ECL Gate with Single Fan-out Digital Integrated Circuits Inverter © Prentice Hall 1995
Simulated Collector Currents of Differential Pair Digital Integrated Circuits Inverter © Prentice Hall 1995
Propagation Delay of ECL Gate Digital Integrated Circuits Inverter © Prentice Hall 1995
Simulated Transient Response of ECL Inverter Digital Integrated Circuits Inverter © Prentice Hall 1995
Propagation Delay as a Function of Bias Current Digital Integrated Circuits Inverter © Prentice Hall 1995
ECL Power Dissipation Digital Integrated Circuits Inverter © Prentice Hall 1995
Scaling Model for Bipolar Inverter Digital Integrated Circuits Inverter © Prentice Hall 1995
Bipolar Scaling Digital Integrated Circuits Inverter © Prentice Hall 1995
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