The HPC Challenge HPCC Benchmark Suite Presented by

The HPC Challenge (HPCC) Benchmark Suite Presented by Piotr Luszczek http: //icl. cs. utk. edu/hpcc/

HPCC Components 1. Ax=b HPL (High Performance LINPACK) 2. STREAM 3. PTRANS ---------------------------name kernel bytes/iter FLOPS/iter ---------------------------COPY: a(i) = b(i) 16 0 SCALE: a(i) = q*b(i) 16 1 SUM: a(i) = b(i) + c(i) 24 1 TRIAD: a(i) = b(i) + q*c(i) 24 2 ---------------------------A ← AT+B 64 bits 4. Random. Access 5. FFT +1 6. Matrix-matrix multiply -1 C ← s*C + t * A*B 7. b_eff (effective bandwidth/latency) T[k] (+) ai T: ping pong 2 zk= xj exp(-2 -1 jk/n)

HPCC: Motivation and Measurement Temporal Locality High FFT DGEMM HPL Mission Partner Applications Random. Access Low PTRANS STREAM Spatial Locality High Concept Measurement Spatial and temporal data locality here is for one node/processor - i. e. , locally or “in the small”. 3 Generated by PMa. C @ SDSC HPC Challenge Benchmarks Select Applications

HPCC: Scope and Naming Conventions M M P P P M P P G P EP Network Single M M P P P S M P P P P CPU core(s) M P P 4 Network thread P P Open. MP Vectorize Software modules Computational resources M P Memory Global CPU P Embarissingly Parallel M system M Network M HPL STREAM FFT. . . Random. Access(1 m) HPL(25%) MPI Interconnect

HPCC: Hardware Probes HPC Challenge Benchmark Corresponding Memory Hierarchy ·Top 500: solves a system Registers Ax = b Instr. Operands Cache ·STREAM: vector operations A=B+sx. C Blocks bandwidth Local Memory Messages latency ·FFT: 1 D Fast Fourier Transform Remote Memory Z = FFT(X) ·Random. Access: random updates T(i) = XOR( T(i), r ) · HPCS program has developed a new suite of benchmarks (HPC Challenge) · Each benchmark focuses on a different part of the memory hierarchy · HPCS program performance targets will flatten the memory hierarchy, improve real application performance, and make programming easier 5 Pages Disk HPCS Performance Targets (improvement) 2 Petaflops (8 x) 6. 5 Petabyte/s (40 x) 0. 5 Petaflops (200 x) 64, 000 GUPS (2000 x)

HPCC: Official Submission Process 1. Download Prequesites: ● C compiler ● BLAS ● MPI 2. Install 3. Run 4. Upload results Provide detailed installation and execution environment 5. Confirm via @email@ 6. Tune 7. Run 8. Upload results 9. Confirm via @email@ Optional 6 Only some routines can be replaced ● Data layout needs to be preserved ● Multiple languages can be used ● Results are immediately available on the web site: ● Interactive HTML ● XML ● MS Excel ● Kiviat charts (radar plots)

HPCC Submissions over Time FFT [Gflop/s] Sum HPL [Tflop/s] #1 #1 Random. Access [GUPS] Sum #1 7 Sum STREAM [GB/s] Sum #1

HPCC: Comparing 3 Interconnects · 3 AMD Opteron clusters - · Interconnect types A. B. C. - · G-HPL Matrix-matrix multiply Available on HPCC website - 8 Vendor Commodity Gig. E G-HPL Matrix-matrix multiply Cannot be differentiated based on: - · Clock: 2. 2 GHz 64 -processor cluster http: //icl. cs. utk. edu/hpcc/ Kiviat chart (radar plot)

Peta HPCC: Sample Results’ Analysis · HPC systems - Hierarchy constant · HPCS Goals - Hierarchy flattens - Easier to program 9 Tera Giga - Hierarchy steepens Clusters ~106 Mega · Clusters HPCS ~102 HPC ~104 Kilo · Highlights memory hierarchy Effective Bandwidth (words/second) · All results in words/second Systems (in Top 500 order)

HPCC Augmenting June’ 07 TOP 500 rating 10 Data provided by HPCC database

Contacts Piotr Luszczek http: //icl. cs. utk. edu/hpcc/ 11