The Hi SIM Family of CompactModels for Integrated

The Hi. SIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara, U. Feldmann, and M. Miura-Mattausch Hiroshima University Hi. SIM Research Center Research Institute for Nanodevice and Bio Systems Graduate School for Advanced Sciences of Matter 1

Outline of Presentation 1. Introduction 2. Modeling Based on a Consistent Potential Distribution 3. Bulk MOSFET Model Hi. SIM 2 4. Silicon-On-Insulator (SOI) MOSFET 5. Double-Gate MOSFET 6. MOS Varactor 7. High-Voltage Devices l l High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT) 8. Thin-Film Transistor (TFT) 9. Conclusion 2

Basic Compact Model Approaches for the MOSFET Threshold-Voltage-Based Models (e. g. BSIM 3, BSIM 4) ● currents expressed as functions of applied voltages ● different equations for: - sub-threshold region - linear region - saturation region New Generation of Surface-Potential-Based Models ● implicit equation for surface potential ● currents determined from drift and diffusion term of current density equation ● developed calculation methods for the surface potential: - iterative solution with the exact surface-potential equation ⇒Hi. SIM st nd - approximate explicit solution by 1 & 2 order perturbation theory, after prior conditioning of the surface-potential equation ⇒PSP New Generation of Inversion-Charge-Based Models ● additional approximation to solve for inversion charge ⇒ EKV, BSIM 5, ACM 3

Basic Equations for Potential-Based Device Model s (solved by SPICE) 4

Consistency Property of Surface-Potential Model Q(f) n = m E: velocity = : mobility The surface potential consistently determines charges, capacitances and currents under all operating conditions. 5

Outline of Presentation 1. Introduction 2. Modeling Based on a Consistent Potential Distribution 3. Bulk MOSFET Model Hi. SIM 2 4. Silicon-On-Insulator (SOI) MOSFET 5. Double-Gate MOSFET 6. MOS Varactor 7. High-Voltage Devices l l High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT) 8. Thin-Film Transistor (TFT) 9. Conclusion 6

Development History of Bulk-MOSFET Model Hi. SIM 1990 JJAP 1991 SISPAD 　Sub-1 mm MOSFETs “ 1994 ICCAD “ 1995 Siemens Flash-EEPROM 1998 STARC 100 -nm MOSFET short-channel effect model 1 st surface-potential-based model parameter extraction strategy simulation time & stability verification concurrent device/circuit development collaboration start Release Activity 2001 Oct. release to vendors 2002 Jan. release to public Oct. “ Hi. SIM 1. 0. 0 source code and manual “ “ Hi. SIM 1. 1. 1 “ 2003 Oct. Test release to STARC clients 2005 May release to CMC members July “ Oct. “ 2006 Jan. release to EDA vendors 2007 March “ 2008 Sept. release to CMC members Hi. SIM 2. 0. 0 source code and manual Hi. SIM 2. 0. 0 “ + Verilog-A code Hi. SIM 2. 2. 0 “ Hi. SIM 2. 3. 0 Hi. SIM 2. 4. 3 eval. for standardization 7

Modeled Phenomena in Hi. SIM 2. 4. 3 [Phenomena]　　　　 [Subjects] Short Channel: Reverse-short Channel: 　　 impurity pile-up pocket implant Poly-Depletion: Quantum-Mechanical: Channel-Length Modulation: Narrow-Channel: Temperature Dependency: thermal voltage bandgap 　 ni phonon scattering maximum velocity Mobility Models: 　 　　　　　　universal 　 high Field 　 Shallow-Trench Isolation: 　threshold voltage 　　　　　mobility 　　　　 leakage current Capacitances: 　　　　　intrinsic 　　　　　overlap　　 　　　　　lateral-field induced fringing　 [Phenomena]　　　　 [Subjects] Non-Quasi-Static: transient time-domain 　 AC frequency-domain Noise: 　　　　　1/f 　　　　　　　 thermal 　　 　　　　　　 induced gate 　　　　　　　 cross-correlation Leakage Currents: substrate current 　　　　　　　 gate current 　　　　　　　 GIDL current　 Source/Drain Resistances: Junction Diode: 　　　　　　 currents capacitances Binning Option DFM Option 8

Hi. SIM’s Surface Potentials at Source and Drain Basic Surface-Potential Equation Iterative Hi. SIM Solution in Comparison to 2 D-Devices Simulation The absolute values of the Hi. SIM surface potential compare well with 2 D simulation. 9

Surface-Potential Dependence on Applied Voltages f. SLsaturates 10

Bias Dependence & Derivatives of Surface Potential Hi. SIM accurately reproduces even the bias dependence of the surface-potential derivatives. 11

Gummel-Symmetry Properties (Hi. SIM 243) model parameters: default Ids vs. Vx Ids / Vx vs. Vx Ids 2 / Vx 2 vs. Vx Ids 3 / Vx 3 vs. Vx 12

Short-Channel-Effect Model (approximating a quadratic potential distribution) M. Miura-Mattausch et al. , IEEE TED, 48, p. 2449, 2001. 13

Vth (V) Pocket-Implantation Model Including tail for high pocketdoping concentrations. H. Ueno et al. , IEEE TED, 49, p. 1783, 2002. 14

Model Extraction for Advanced 45 nm Technology Wg/Lg=2 mm/200 nm Wg/Lg=2 mm/40 nm Measurement Hi. SIM can model advanced 45 nm technology very accurately without the necessity of binning. 15

Current Derivatives for Advanced 45 nm Technology Measurement Hi. SIM Wg/Lg= 2 mm/40 nm The current derivatives of a 45 nm technology can likewise be well reproduced with Hi. SIM. 16

Hi. SIM’s Model Evaluation Time Arbitrary Units total CPU extrinsic device characteristics intrinsic device characteristics f. SLiteration f. S 0 iteration Vgs Data: Hi. SIM 2. 4. 0 Iteration for surface-potential determination requires only a small fraction of the total model evaluation time. 17

Outline of Presentation 1. Introduction 2. Modeling Based on a Consistent Potential Distribution 3. Bulk MOSFET Model Hi. SIM 2 4. Silicon-On-Insulator (SOI) MOSFET 5. Double-Gate MOSFET 6. MOS Varactor 7. High-Voltage Devices l l High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT) 8. Thin-Film Transistor (TFT) 9. Conclusion 18

Determination of Involved Potentials BOX FOX 2 D-Device 19

I-V Curve Reproduction and Short-Channel Effect This Device does not show a floating body effect! 20

1/f-Noise Modeling 21

Comparison with 1/f-Noise in Bulk MOSFETs 1/f-Noise in the SOI-MOSFET is substantially increased! 22

Modeling of the Floating-Body Effect The floating-body effect is modeled on the basis of excess hole charge due to impact ionization. 23

Modeling of the Dynamic-Depletion Effect The dynamic-depletion effect is accurately captured due to the consistently potential-based model concept. 24

Outline of Presentation 1. Introduction 2. Modeling Based on a Consistent Potential Distribution 3. Bulk MOSFET Model Hi. SIM 2 4. Silicon-On-Insulator (SOI) MOSFET 5. Double-Gate MOSFET 6. MOS Varactor 7. High-Voltage Devices l l High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT) 8. Thin-Film Transistor (TFT) 9. Conclusion 25

Specific Features of the Double-Gate (DG) MOSFET Vgs=1 V Vds=0 V gate Tsi=40 nm gate Tsi=20 nm gate Tsi=10 nm gate carrier concentration Body potential is floating. Tsi The floating body potential makes modeling difficult. 26

Hi. SIM-DG Accuracy for the Center Surface Potential The potentials at center and surface are determined with Hi. SIM-DG as accurately as in 2 D-device simulation. 27

Short-Channel Effect in DG MOSFETs The drastic reduction of the short-channel effect is a big advantage of the double-gate MOSFET. 28

Potential Dependence: Silicon Thickness and Nsub TSi fs 0 (V) Nsub 29

Ids-Vgs Characteristics Reproduction 30

C-V Characteristics Reproduction Reduction of Tsi has only a small influence on the capacitance. 31

Impurity-Concentration Dependence of Vth TSI=10 nm, Tox=1 nm, Lg=1 um, Vds=50 m. V Influence of Qb cannot be ignored. 32

Outline of Presentation 1. Introduction 2. Modeling Based on a Consistent Potential Distribution 3. Bulk MOSFET Model Hi. SIM 2 4. Silicon-On-Insulator (SOI) MOSFET 5. Double-Gate MOSFET 6. MOS Varactor 7. High-Voltage Devices l l High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT) 8. Thin-Film Transistor (TFT) 9. Conclusion 33

Structure of the Accumulation-Mode MOS-Varactor 34

Carrier-Movement Delay in Accumulation Mode t is inverse proportional to the electric field. 35

Frequency Dependence of MOS-Varactor Capacity 36

Outline of Presentation 1. Introduction 2. Modeling Based on a Consistent Potential Distribution 3. Bulk MOSFET Model Hi. SIM 2 4. Silicon-On-Insulator (SOI) MOSFET 5. Double-Gate MOSFET 6. MOS Varactor 7. High-Voltage Devices l l High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT) 8. Thin-Film Transistor (TFT) 9. Conclusion 37

High-Voltage MOSFET Structures (Asymmetric) (Symmetric) Public/Release Activities for Hi. SIM_HV Model 2006 Oct. 2007 Dec. 2008 June 2008 Dec. candidate for CMC standardization selected for CMC standardization Hi. SIM_HV 1. 0. 2 release (evaluated as first standard version) Hi. SIM_HV 1. 0. 2 named CMC standard model 38

Hi. SIM 2 Properties Facilitating Extension to HV-MOS Complete Surface-Potential-Based Model Hi. SIM for Bulk-MOSFET f. S 0 : at source edge f. SL : at the end of the gradual-channel approx. f. S(DL) : at drain edge (calculated from f. SL) Beyond Gradual-Channel Approximation l. Channel-Length Modulation l. Overlap Capacitance 39

Consistent Potential Drop Modeling in Drift Region Ldrift Ndrift Potential drop in the drift region All important potential values are known. No sub-circuit for the potential drop is necessary. 40

f. S(DL) : potential determining LDMOS characteristics 　 f. S(DL) [V] Consistency Evaluation of Key Potential Values HV Vgs [V] HV Vds [V] Hi. SIM reproduces f. S(DL) calculated by 2 D-device simulator. 41

Accuracy Comparison of Id-Vgs : 2 D-Device Simulation Results : Hi. SIM-HV Results Vds=10 V gm [S] Id [A] Vds=20 V Vds=5 V Vds=0. 1 V Good agreement between Hi. SIM-HV results and 2 D-device simulation results is achieved. 42

Accuracy Comparison of Id-Vds : 2 D-Device Simulation Results : Hi. SIM-HV Results Vgs=7. 5 V gd [S] Id [A] Vgs=10 V Vgs=5 V Vgs=2. 5 V Quasi-saturation behavior of LDMOS is reproduced. 43

Reproduction of Key Capacitance Features Ldrift = 1. 5 mm Vds = 10 V Vgs [V] HV Vgs [V] Charge in the drift region is modeled explicitly. 44

Reproduction of Intrinsic Capacitances Symmetrical HVMOS 2. 0 Cgg 1. 8 1. 2 Cgd Cgb 0. 8 0. 4 Capacitance [f. F] Asymmetrical LDMOS Cgs Vds=0 V -4 -2 0 Vgs [V] 2 4 Vgs [V] Hi. SIM-HV is capable to reproduce all intrinsic capacitances with good accuracy. 45

Concept of the Hi. SIM-IGBT Compact Model Schematic structure of a modern trench-IGBT Jn n- (base) Simplified circuit diagram of the Hi. SIM-IGBT model Consistent potential extension in Hi. SIM-IGBT is achieved by calculation based on Kirchhoff’s laws. 46

Fitting Results for the I-V Characteristics of the IGBT Hi. SIM-IGBT achieves accurate reproduction of the IGBT’s I-V characteristic and also scales with the base doping. M. Miyake et al. , “A Consistently Potential Distribution Oriented Compact IGBT Model”, IEEE PESC, pp. 998 -1003, June 2008 47

Outline of Presentation 1. Introduction 2. Modeling Based on a Consistent Potential Distribution 3. Bulk MOSFET Model Hi. SIM 2 4. Silicon-On-Insulator (SOI) MOSFET 5. Double-Gate MOSFET 6. MOS Varactor 7. High-Voltage Devices l l High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT) 8. Thin-Film Transistor (TFT) 9. Conclusion 48

Concept of the Thin-Film-Transistor (TFT) Model Typical structure of the poly-Si TFT Effect of Traps on the I-V characteristic TFT modeling is based on including the trap charge in the Poisson equation. S. Miyano et al. , “A surface potential based Poly-TFT model for circuit simulation”, IEEE SISPAD, Sept. 2008 49

Reproduction of Fabricated TFT-Device Data Accurate reproduction of I-V characteristic and scaling with gate length is achieved. S. Miyano et al. , “A surface potential based Poly-TFT model for circuit simulation”, IEEE SISPAD, Sept. 2008 50

Conclusion ● Hi. SIM 2 is a compact surface-potential-based MOSFET model with a minimum number of approximations, due to its iterative surface-potential determination. ● Hi. SIM 2 allows to preserve a consistent potential-based modeling in its extension to other integrated-device structures containing a MOSFET core. A compact-model family covering all integrated devices containing a MOSFET core and sharing the same modeling concepts could be developed. 51