The Gigabit Link Interface Board GLIB Paschalis VICHOUDIS
The Gigabit Link Interface Board (GLIB) Paschalis VICHOUDIS CERN PH-ESE-BE x. TCA Interest Group meeting – 07 March 2011 x. TCA IG, 07 -March-2011 1
The Team v Sophie Baron v Manoel Barros Marin v Vincent Bobillier v Stefan Haas v Magnus Hansen v Markus Joos v Francois Vasey v Paschalis Vichoudis PH-ESE-BE GLIB project homepage: https: //espace. cern. ch/project-GBLIB/public x. TCA IG, 07 -March-2011 2
Outline 1. INTRODUCTION 2. IMPLEMENTATION 3. STATUS & DELIVERABLES x. TCA IG, 07 -March-2011 3
Introduction CONCEPT THE GLIB IS: an evaluation platform and an easy entry point for users of high speed optical links THE GLIB IS TARGETED FOR: optical link evaluation in the laboratory control, triggering and data acquisition from remote modules in beam or irradiation tests x. TCA IG, 07 -March-2011 4
Introduction OVERVIEW Ø Mid-size double-width Advanced Mezzanine Card (AMC) Ø Serves as an evaluation platform and an easy entry point for users of high speed optical links. Ø 4 SFP+ transceiver modules Ø Virtex-6 FPGA with twenty 6. 5 Gbps transceivers. Ø I/O capability can be further enhanced with two FPGA Mezzanine Cards (FMC). Ø Gigabit Ethernet link to PC for bench-top operation. x. TCA IG, 07 -March-2011 5
Introduction TYPICAL USE CASES (1/6) BENCH-TOP: beam test setup x. TCA IG, 07 -March-2011 = TTC FMC = SFP+ 6
Introduction TYPICAL USE CASES (2/6) BENCH-TOP: front-end module test setup x. TCA IG, 07 -March-2011 = E-LINK FMC = TTC FMC = SFP+ 7
Introduction TYPICAL USE CASES (3/6) BENCH-TOP: system test setup x. TCA IG, 07 -March-2011 = TTC FMC = SFP+ 8
Introduction TYPICAL USE CASES (4/6) BENCH-TOP: system test setup [remote control/readout] x. TCA IG, 07 -March-2011 = 10 Gb. E FMC = TTC FMC = SFP+ 9
Introduction TYPICAL USE CASES (5/6) CRATE: beam test setup x. TCA IG, 07 -March-2011 = TTC FMC = SFP+ 10
Introduction TYPICAL USE CASES (6/6) CRATE: system test setup x. TCA IG, 07 -March-2011 = TTC FMC = SFP+ 11
Implementation ARCHITECTURE x. TCA IG, 07 -March-2011 12
First Prototype CMS workshop, 01 -Feb-2010 x. TCA IG, 07 -March-2011 13
First Prototype CMS workshop, 01 -Feb-2010 x. TCA IG, 07 -March-2011 14
Implementation INTERFACES (1/2) Optical Four SFP+ cages AMC Port [0 -1]: Gb. E. Port [4 -7] (Fat Pipe): PCIe x 4 GEN 2. Possibility to implement other protocols. Port [8 -11] (Extended Fat Pipe): PCIe x 4 GEN 2. Possibility to implement other protocols. Port [2: 3]: LVDS I/O pairs. Possibility to implement other differential I/O standards. Port [12 -15]: LVDS I/O pairs. Possibility to implement other differential I/O standards. Port [17 -20]: M-LVDS. CLK 1/TCLKA: M-LVDS clock input. CLK 2/TCLKB: M-LVDS clock input/output. CLK 3/FCLKA: HCSL/M-LVDS clock input. x. TCA IG, 07 -March-2011 15
Implementation INTERFACES (2/2) FMC 2 High-pin count (HPC) sockets 160 user-specific I/Os (single-ended or differential pairs) 2 differential clock inputs and 2 differential clock outputs. The primary FMC is accessible from the front panel The primary FMC also provides four optional 6. 5 Gbps transceiver lines. PC (only in bench-top operation) Gb. E RJ 45 socket (1000 BASE-T). PCIe 4 x GEN 2 adapter board. Possibility to implement additional PC interfaces on the FMC mezzanines. x. TCA IG, 07 -March-2011 16
Implementation FPGA XILINX Virtex-6 LXT FPGA ( VLX 130 T, FF 1156 package) 600 I/O that can be configured to various differential or single-ended standards. 4 Ethernet MAC and 2 PCIe Hard-IP blocks. 20 6. 5 Gbps transceivers (MGTs) organized in 5 quads. ~10 Mb of block RAM. Pin Compatible with higher capacity FPGAs – VLX 195, VLX 240, VLX 365, VSX 315 x. TCA IG, 07 -March-2011 17
Implementation RAM & MMC On-board memory Two 72 Mb (2 M x 36 bit) SRAM devices (CY 7 C 1470 by Cypress) Operating frequency at up to 250 MHz. Upgradeable up to 1. 125 Gb (once available) Module Management Controller (MMC) Implements the Intelligent Platform Management Interface (IPMI) for the AMC initialization and monitoring in μTCA environment. Mezzanine card based on an ATMEL microcontroller. Developed by CPPM (microcontroller firmware in collaboration with DESY). Dimensions: 39 mm x 20 mm x 10 mm. x. TCA IG, 07 -March-2011 18
Implementation CLOCK DISTRIBUTION x. TCA IG, 07 -March-2011 19
Implementation MODULE MANAGEMENT CONTROLLER ns o applicati p o t h c n be uired for q e r t o N e: Not x. TCA IG, 07 -March-2011 20
Implementation JTAG CIRCUITRY esting t for T Importan x. TCA IG, 07 -March-2011 21
Implementation POWERING Power bu dget: Up x. TCA IG, 07 -March-2011 to 0. 5 W f or Mana gement a nd 80 W fo r Payload Power 22
Implementation POSSIBLE FMC IMPLEMENTATIONS x. TCA IG, 07 -March-2011 23
Implementation FIRMWARE ARCHITECTURE x. TCA IG, 07 -March-2011 24
Implementation TESTING - Possibility for boundary scan testing - Use of commercial hardware for creating loopbacks and providing clock I/O for connectivity and clock distribution testing, respectively. x. TCA IG, 07 -March-2011 - Testing of optical parts (loopbacks w/ optical fibres, BER measurements etc) - Various testpoints on board - Special testing software and firmware 25
Summary https: //edms. cern. ch/nav/EDA-02180 -V 1 -0 Ø Specifications: v 1. 9 available. Ø Hardware: First prototype available, on-going tests. Ø Testing tools: Commercial hardware, boundary scan software. Ø Infrastructure: Crate, MCH available, commercial AMCs available. Getting familiar with. Ø Software/firmware: Development on-going. specs from GLIB website Latest news: GLIB has entered the open hardware repository. GLIB at OHR ** Presented at TWEPP 2010 ** x. TCA IG, 07 -March-2011 26
Deliverables The GLIB team envisages to deliver and support software, firmware and hardware for the following 3 setups: - Bench-top beam test setup - Bench-top front-end module test setup - Crate system test setup The required FMCs (TTC & E-Link) will also be delivered and supported. Bench-top beam test setup x. TCA IG, 07 -March-2011 Bench-top front-end module test setup Crate system test setup = E-LINK FMC = TTC FMC = SFP+ 27
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