Tevatron RunII Silicon Detector Operations and Aging Michelle



























![Fit to Hamburg Model [M. Moll thesis, Uni Hamburg] Layer 1 Inner Fit Assume Fit to Hamburg Model [M. Moll thesis, Uni Hamburg] Layer 1 Inner Fit Assume](https://slidetodoc.com/presentation_image_h2/dca4c52ed26ee6889baea512d3447081/image-28.jpg)




































- Slides: 64
Tevatron Run-II Silicon Detector: Operations and Aging Michelle Stancari Fermi National Accelerator Laboratory (on behalf of the D 0 and CDF-II Silicon groups)
Outline Introduction to CDF & D 0 Silicon Detectors � Radiation Field Measurement by CDF � Aging Studies � • Bias Currents • Signal to Noise Ratio • Depletion Voltage Miscellaneous � Conclusions � Michelle Stancari 19 th RD 50 Workshop November 22, 2011 2
Introduction Michelle Stancari 19 th RD 50 Workshop November 22, 2011
CDF-II Silicon Strip Detectors 8 Layers, 704 ladders, 722432 Channels � � � Layer 00 (L 00): 1 Single Sided Layer SVXII: 5 Double Sided Layers ISL: 2 Double Sided Layers Michelle Stancari 10. 10 cm 8. 22 6. 52 4. 12 2. 54 1. 35/1. 62 19 th RD 50 Workshop November 22, 2011 4
L 00 geometry “Wides” at r=1. 62 cm made by Hamamatsu “Narrows” at r=1. 35 cm made by SGS Thompson ** 2 of 12 ladders are special oxygenated sensors from Micron for R&D SVX-L 0 r=2. 54 cm Michelle Stancari 19 th RD 50 Workshop November 22, 2011 5
CDF Sensor Comparison L 00 p+ strips on n bulk single-sided � <100>-orientation � Sensor breakdown >600 V Power supplies <500 V � Operating temp: -5 °C � Shutdown temp: 0 °C � Hybrids outside tracking volume � 1/6 are oxygenated sensors � SVX p+ strips on n bulk double-sided � <111>-orientation � Sensor breakdown 170 -200 V � Operating temp: ~8°C � Shutdown temp: ~0 -5 °C � Hybrids attached to sensors � Displaced vertex trigger � L 00 designed to outlast SVX-L 0 Michelle Stancari 19 th RD 50 Workshop November 22, 2011 6
NIMA 634, 8 NIMA 622, 298 DØ Silicon Microstrip Tracker ~108 cm AC-coupled Si Sensor 6 Barrels, 4 super layers A Barrel Module Operated at ~0°C, Installed in 2001 (Layer 0 in 2006) ~20 cm 12 FDisks 2 H-Disks Layer 0 Barrel F Disk H Disk Sensor Hamamatsu SS Micron SS and DS Micron and Eurysis DS Elma SS Inner R 1. 61 cm 2. 7 cm 2. 6 cm 9. 5 cm Outer R 1. 77 cm 10. 1 cm 10. 5 cm 26 cm More details in Proceedings from. Ye TIPP 2011 Zhenyu (Fermilab) and IEEE 2009 (Z. Ye)
Run 2 Voltage increases every 3 -6 months First voltage increases needed Michelle Stancari 19 th RD 50 Workshop November 22, 2011 8
Radiation Field Determination
Measured Radiation Field NIM A 514 (2003) 188 Michelle Stancari 19 th RD 50 Workshop November 22, 2011 10
Measured Radiation Field • TLD measurement: dose (Mrad/fb-1) = (1. 5± 0. 3)/r 1. 5 (r in cm) • assume cylindrical symmetry and extrapolate inside the silicon detector • Use measured bias currents to verify r-dependence • Convert to 1 Me. V neutron equivalent by assuming Ø that contributions of photons and low energy neutrons to the TLD measurements are negligible Ø all CDF MIPs are pions which do half the damage of a 1 Me. V neutron 1 Mrad = 1. 935 ± 0. 387 x 1013 neq/cm 2 (20% uncertainty) (need to investigate the momentum distribution of pions in minimum bias data sample) NIM A 514 (2003) 188 Michelle Stancari 19 th RD 50 Workshop November 22, 2011 11
Evolution of Bias Currents Using a 95 pb-1 sample, the slope of current vs lumi was extracted for each sensor � Thermal model used to correct currents to 20°C � � � the r dependence of the TLDmeasured field was verified Sensor temperature uncertainty is large (for now) Michelle Stancari 19 th RD 50 Workshop November 22, 2011 12
TLDs and bias currents Plot by Ignacio Redondo Bias currents TLD measurement CMS 2011 measured (G. Bolla, ) Consistent with CMS, considering the systematic error on vertical scale for TLD and SVX currents Errors on currents reflect uncertainty of sensor temperature Michelle Stancari 19 th RD 50 Workshop November 22, 2011 13
Aging studies: Bias Currents Michelle Stancari 19 th RD 50 Workshop November 22, 2011 14
Fluence vs Delivered Luminosity Layer 1, 2, 3, 4 L 1 • • Estimate the fluence from the leakage current Φeq=ΔI / Vα [V: volume, α: damage constant taking into account temperature and time dependence] Dependence of Fluence on integrated luminosity and radius Φeq/L= 1. 5± 0. 8 x 1013 cm-2/fb-1 x (r/1 cm) -1. 3± 0. 3 Zhenyu Ye (Fermilab)
CDF Bias currents I/V at 0 °C (m. A/cm 3) I/V after 12 fb-1 PRELIMINARY Michelle Stancari 19 th RD 50 Workshop • Annealing for 25 days at 18°C • Raw currents - no annealing corrections • Average over all sensors in same layer assuming same dose and same temperature • Error bars from sensor temperature uncertainty • Horizontal axis scale uncertainty: ± 20% November 22, 2011 20
Aging Studies: S/N Michelle Stancari 19 th RD 50 Workshop November 22, 2011
Signal / Noise Measurements � � � Signal from J/y m+m- tracks – total cluster charge Noise measured bi-weekly with beam Extrapolations assume fully depleted sensors SVX p-side Michelle Stancari PRELIMINARY 19 th RD 50 Workshop SVX n-side November 22, 2011 22
20% Signal decrease SVX L 00 PRELIMINARY 0. 072 x 1014 neq/fb-1 0. 16 x 1014 neq/fb-1 • Sum charge over strips that form cluster Michelle Stancari 19 th RD 50 Workshop November 22, 2011 23
20% Noise Increase SVX L 00 PRELIMINARY 0. 072 x 1014 neq/fb-1 0. 16 x 1014 neq/fb-1 • Average noise over strips that form cluster Michelle Stancari 19 th RD 50 Workshop November 22, 2011 24
SMT Performance Evolutoin =2. 2 x 1013 cm-2/fb-1 at r=1 cm Zhenyu Ye (Fermilab)
Aging Studies: Depletion Voltage Michelle Stancari 19 th RD 50 Workshop November 22, 2011 27
Noise vs Bias Voltage 0. 3 fb-1 2. 2 fb-1 0. 6 fb-1 2. 3 fb-1 1. 1 fb-1 P-side Noise N-side Noise find the kink full depletion fit full depletion voltage 4. 0 fb-1 28 4. 5 fb-1 4. 9 fb-1 Zhenyu Ye (Fermilab) 5. 4 fb-1
Noise Scans n-side noise p-side noise Michelle Stancari Measure noise (rms of the ADC counts) as function of bias voltage • no beam wasted • only works for SVX sensors before inversion 19 th RD 50 Workshop November 22, 2011 29
Noise Scans Michelle Stancari 19 th RD 50 Workshop November 22, 2011 30
Noise Scans – compare 3 layers PRELIMINARY SVX-L 0 SVX-L 1 SVX-L 3 0. 194 x 1014 neq/Mrad Michelle Stancari 19 th RD 50 Workshop November 22, 2011 31
Charge Collection Efficiency vs Bias Voltage Fit signal vs bias voltage with a sigmoid function 95% charge collection efficiency as the full depletion 0. 29 fb-1 0. 56 fb-1 3. 68 fb-1 1. 13 fb-1 32 Zhenyu Ye (Fermilab)
Fit to Hamburg Model [M. Moll thesis, Uni Hamburg] Layer 1 Inner Fit Assume CDF Run 1 value 2. 2 x 1013 cm 2/fb-1 at r=1 cm and fit two parameters: Neff 0 , p Zhenyu Ye (Fermilab) Today
SMT Performance Evolutoin =2. 2 x 1013 cm-2/fb-1 at r=1 cm 34 Zhenyu Ye (Fermilab)
Depletion Voltage Measurement Plot collected charge for different bias voltages Determine depletion voltage as the minimum voltage that collects 95% of the charge at the plateau � Extrapolate into the future linear fit after inversion point � � 130 V Michelle Stancari 0. 185 x 1014 neq/fb-1 19 th RD 50 Workshop November 22, 2011 37
Slope comparison with HM SUPER-PRELIMINARY FZ with no annealing HM (t=0, F->¥, gc=0. 015, ga=0. 018) SVX-L 0 SVX-L 1 L 00 wide L 00 narrow oxygenated Scale Michelle Stancari uncertainty: ± 20%19 th ± 20% RD 50 Oxyg. with no annealing HM (t=0, F->¥, gc=0. 006, ga=0. 018) FZ with max ben. annealing HM (F->¥, gc=0. 015, Na=0) Oxyg. with max ben. annealing HM (F->¥, gc=0. 006, Na=0) Workshop November 22, 2011 41
Double Junction Michelle Stancari 19 th RD 50 Workshop November 22, 2011 42
Double Sided Sensors 6. 88 fb-1 Qualitative observation The (heavily irradiated) sensors are depleting from the two sides toward the center � Consistent with a doubly-peaked electric field � Michelle Stancari 19 th RD 50 Workshop November 22, 2011 43
L 00 evolution 0. 39 fb-1 0. 65 fb-1 1. 55 fb-1 2. 04 fb-1 Michelle Stancari 19 th RD 50 Workshop 0. 94 fb-1 After inversion, sensors still have signals when under-depleted! November 22, 2011 44
L 00 evolution 0. 39 fb-1 2. 04 fb-1 4. 53 fb-1 7. 03 fb-1 9. 01 fb-1 10. 63 fb-1 Michelle Stancari 19 th RD 50 Workshop November 22, 2011 45
Micro-Discharge Effect Michelle Stancari 19 th RD 50 Workshop November 22, 2011 46
Micro-discharge effect limits the maximum bias voltage that can be applied to double sided sensors, especially p side of D 0 double sided sensors. The effect is studied with the D 0 Silicon tracker and TCAD simulation. We did not observe significant change in the micro-discharge onset voltages before and after sensor type-inversion. We discovered that micro-discharge effect is sensitive to magnetic field. Its sensitivity to humidity was also explored and no significant change was observed with humidity increased from 20 ppm to 95 ppm.
Micro-Discharge Effect Maximum bias voltage for DS sensors 110 -150 V: AC-coupling capacitor breakdown Micro-discharge effect: local avalanches near implant edges. Simulation Using Silvaco TCAD 48 Zhenyu Ye (Fermilab)
Micro-Discharge Effect Full depletion Maximum bias voltage for DS sensors <(110 -150) V: V(n side)<+(90 -120)V by breakdown of AC coupling capacitor breakdown. V(p side)>-(20 -30)V by micro-discharge effect. Same before/after type inversion. Simulation suggests that asymmetric behavior between p and n side is due to the positive charge accumulated in Si. O 2. 49 We studied whether varying the humidity an influence on p side Zhenyu Yehas (Fermilab) breakdown voltage and thus the maximum bias voltage.
Sensitivity to Magnetic Field We observed sensitivity of the micro-discharge effect to solenoid magnetic field (~2 Tesla). 50 Zhenyu Ye (Fermilab)
Thermal Runaway Michelle Stancari 19 th RD 50 Workshop November 22, 2011 51
IV scan at 18°C • We took daily IV curves for 24 L 00 ladders and 72 SVX ladders during the annealing studies with the cooling set at 18 deg C • One L 00 ladder of the 24 could not be biased at its operating voltage of 300 V its current was over the 6 m. A power supply limit • Green squares to the left were acquired every 9 seconds as the voltage was raised in discrete steps with 5 minutes between changes. Michelle Stancari 19 th RD 50 Workshop November 22, 2011 52
CDF Future Improvements � Conversion to neq fluences: • ladder by ladder using measured beam offsets �Sensor temperature uncertainties: • Sensor temperatures were measured 3 weeks ago! • Improve radiation field knowledge (perhaps replace TLD measurements with bias currents? ) • Include temperature differences among the sensors in bias current presentation � Analyze I-V curves from annealing studies Michelle Stancari 19 th RD 50 Workshop November 22, 2011 53
Summary and Conclusions There is a big step from operating a detector to extracting information about radiation damage. . . we have all the pieces! The S/N degraded much more quickly than expected (large signal loss, ~20% after 7 fb-1) The depletion voltage after inversion increased slower than (CDF) or as expected (D 0) but with large uncertainties on the expectations Michelle Stancari 19 th RD 50 Workshop November 22, 2011 54
Backup Slides Michelle Stancari 19 th RD 50 Workshop November 22, 2011 55
Noise Scans n-side noise p-side noise Michelle Stancari Measure noise (rms of the ADC counts) as function of bias voltage • no beam wasted • only works for SVX sensors before inversion 19 th RD 50 Workshop November 22, 2011 56
Noise Scans Michelle Stancari 19 th RD 50 Workshop November 22, 2011 57
Noise Scans – compare 3 layers PRELIMINARY Michelle Stancari 19 th RD 50 Workshop SVX-L 0 SVX-L 1 SVX-L 3 November 22, 2011 58
Bias Currents at 18°C 6 SVX sensors Michelle Stancari 19 th RD 50 Workshop November 22, 2011 59
Bias Currents at 18°C 2 L 00 sensors Michelle Stancari 19 th RD 50 Workshop November 22, 2011 60
I-V curves from Vdep meas Current (u. A) Vdep =186 V 180 V 169 V 150 V -------135 V 120 V Voltage (V) From signal scans 2010 & 2011, LB 0 W 1 L 3 Michelle Stancari 19 th RD 50 Workshop November 22, 2011 61
I-V curves at 18°C Michelle Stancari 19 th RD 50 Workshop November 22, 2011 62
Annealing: 24 days at 18°C 2. Power Supply Modifications 1. Measure noise and bias currents 4. Measure IV curves daily 12 groups of 2 L 00+6 SVX ladders 3. Discover cooling limitations 5. Measure bias currents for ° temperature map Michelle Stancari 7. Measure noise and bias currents 11/1/2011 10/27/2011 10/4/2011 9/30/2011 Operating (-10 °C) chips on, bias on 6. Undo Power Supply modifications warm (+18°C) chips off, bias off 19 th RD 50 Workshop Cold (-5°C) chips off, bias off November 22, 2011 13
SVX details Michelle Stancari NIM A 514 (2003) 188 19 th RD 50 Workshop November 22, 2011 64
Operations Michelle Stancari 19 th RD 50 Workshop November 22, 2011 (#)
Operational Challenges Chips require keep alive (frequent trips) � Chip damage after quenches/beam aborts (new collimator installed) � Wire bond resonances (limit level 1 trigger rate and event size for SVX) � L 00 noise (offline correction event-by-event) � SEU requires module reset (PS and readout) and trip recovery � ISL cooling line corrosion � Power supply voltage droop � Michelle Stancari 19 th RD 50 Workshop November 22, 2011 66
No ladder left behind! ~90% ladders integrated ~80% good (< 1% error rate) ~10% bad, average error rate of 10% 3 fb-1 Michelle Stancari 7 fb-1 19 th RD 50 Workshop Optical transmitter (DOIM) failure rate is very small (<1%) mostly single bits with low light Small rate of single chip failures • Stuck or random buffer ID • general garbage data, • bit errors local to chip November 22, 2011 67
Chip Accounting - SVX Common failure modes: 0, 06 Detector includes port cards, junction cards, cables, power supplies, and the sensors themselves. 0, 04 AVDD 2 0, 03 other SVX 3 D Fraction of bad chips 0, 02 Optical is bit errors and failures from the internal DOIM data transmitters Jumper is SVX 3 D chip failures due to wire bond resonances AVDD 2 is a SVX 3 D chip failure mode caused by beam incidents and thermal cycles Other SVX 3 D includes all other chip failure modes (internal) Michelle Stancari SVX phi-side 0, 05 Detector 0, 01 0, 00 03. 01. 02 optical 11. 25. 04 08. 22. 07 05. 18. 10 0, 07 SVX z-side 0, 06 0, 05 AVDD 2 0, 04 other SVX 3 D 0, 03 Detector 0, 02 optical 0, 01 0, 00 03. 01. 02 19 th RD 50 Workshop JUMPER 11. 25. 04 08. 22. 07 05. 18. 10 November 22, 2011 68
Run 2 Voltage increases every 3 -6 months First voltage increases needed Michelle Stancari 19 th RD 50 Workshop November 22, 2011 69
Staying Depleted � Measuring expensive the depletion voltage was • 2 hours of collisions not used for physics (per layer measured) • Black box to analyze data quickly is essential! • Black box needs adjusting as sensors age! � Raising the voltages was time consuming • small voltage steps • handful of ladders at a time to minimize risk • monitor for damage and noise afterward • Power supplies have internal protection limits for bias voltages, must be removed from collision hall to change • In 2010, 3 of 15 L 00 power supplies failed when raised from 250 V to 350 V and needed repairs (originally tested to 500 V). Michelle Stancari 19 th RD 50 Workshop November 22, 2011 70
Chip accounting - ISL 0, 09 0, 08 Fraction of bad chips 0, 07 0, 06 cooling 0, 05 sensor 0, 04 optical 0, 03 SVX 3 D 0, 02 0, 01 0 04. 19. 01 � � 01. 14. 04 10. 06 07. 06. 09 No jumper failures for ISL because readout happens only after L 2 accept No AVDD 2 failures because of warmer temperature than SVX Sensor recovery after JC pushes (disconnected cables) Long history of cooling problems • 2003 – unblocked cooling lines • 2007 – major leak repaired Michelle Stancari 19 th RD 50 Workshop November 22, 2011 71
Expected S/N CDF note 6673 (2003) S/N predictions assumed increase in noise and no change in signal SVX p-side SVX phi L 00 (dashed lines) and SVXL 0 (grey lines) predictions roughly match data? Michelle Stancari 19 th RD 50 Workshop November 22, 2011 72
SVX 3 d chip � Analog Front End and Digital Back End • Compatible with 396/132 nsec bunch spacing • FE has relatively low noise integrator with 128 channels and 46 cell analog pipeline with 4 buffer cells • BE has a comparator, 8 -bit Wilkinson ADC, and sparse readout with nearest-neighbors � Dead-timeless • Capable of analog operations during digitization and readout � Dynamic Pedestal Subtraction • Enables on-chip common mode noise suppression � Fabricated with Honeywell 0. 8 mm rad hard process Michelle Stancari 19 th RD 50 Workshop November 22, 2011 73
SVX 3 d chip 46 pipeline cells Fabricated in the Honeywell 0. 8 mm rad. hard process 128 channels Michelle Stancari 19 th RD 50 Workshop November 22, 2011 74