Test Beam of TGC electronics in 2004 ATLAS

Test Beam of TGC electronics in 2004 ATLAS Muon Week in Seattle 30/June/04 Chikara Fukunaga (TMU) l Introduction l Member List l Electronics Setup l TGC Setup l Overlap problem in 2003 l Preliminary Results in 2004 l Plan for next beam test in Sept. /Oct. this year 1

ATLAS Muon Week in Seattle 30/June/04 Introduction l In June 2004 TGC electronics has been also brought into H 8 and made performance test with a 25 ns bunch structured muon beam (we will do again in September). l The same electronics set has been used as in 2003. The current test is to confirm the performance we have achieved last year, and test trial of the configuration database. We will bring new (almost final) electronics before September. 2

TGC electronics Member List for June 2004 Beam Test ATLAS Muon Week in Seattle 30/June/04 l Israel Y. Benhammou, E. Etzion, A. Harel, L. Levinson, D. Lellouch, R. Lifshitz, N. Lupu, G. Mikenberg, S. Schwarzmann, S. Tarem l Japan O. Sasaki et al. (> 20 people participated) 3

TGC Test Beam Electronics Overview ATLAS Muon Week in Seattle 30/June/04 TTC/CCI Test ROD crate 4

Electronics Setup l Chamber (Triplet 32(Strip) x 24(wire), Doublet both 32 chan. ) l l The same set was used this time as one used in 2003 ASD board (16 ch. ) x 2 PS pack PS board {8 PP (32 ch. ) ASICs (Product. ), 2 SLB ASICs (Proto. Version 2) , 1 DCS-PS } x 2 l Hi-p. T crate ATLAS Muon Week in Seattle 30/June/04 l l l Forward Type Hi-p. T board (4 Hi-p. T ASIC (Proto. Version 3 ~ final) x 1 Proto. Star Switch (SSW) module x 2 HSC l ROD crates l l Sector Logic for r-f coincidence RODs (ROD and Test-ROD simultaneously in different crates) l TTC/CCI crate l l TTCvi - TTCvx CCI l Cables l l l AWT-28 40 twisted pair cable with 10 from ASDs to PS boards Individually shielded TP Category-5 cable from PS board to Hi-p. T crate 10 m (ATLAS: 15 m) for LVDS Optical fiber from Hi-p. T crate to Sector Logic/ROD in the hut 30 m (ATLAS: 150 m) for Glink. l DCS l l Final DCS-PS board with ELMB, mezzanine on a PS board Two DCS-PS boards 5

TGC Setup The chamber configuration has been slightly changed l T 8 type chambers were used for all M 1(Triplet), M 2(Middle) and M 3(Pivot). l ATLAS Muon Week in Seattle 30/June/04 l In 2003 We used the same type chambers for both M 2 and M 3 – overlap problem This year correct chamber set for M 2 is used. l Trigger Electronics used was forward type (PS-board, Hi-p. T board) l Channels M 1 M 2 M 3 Wire 24 32 30 Strip 32 32 32 6

ATLAS Muon Week in Seattle 30/June/04 10 cm Wire Support overlap problem in 2003 Dwire~5 cm Dstrip~4. 5 cm M 1 Triplet Dwire~5 cm Dstrip~4. 5 cm M 2 Middle M 3 Pivot The beam was injected just on the wire support accidentally Triplet ~Layer 6 Doublet ~Layer 7 7 Doublet

Detection Efficiency distorted due to overlap in 2003 ATLAS Muon Week in Seattle 30/June/04 M 1 M 2 M 3 Lower Efficiency due to Wire support Chamber efficiency (Wire) M 1 M 2 M 3 Lower Efficiency due to Wire support Chamber efficiency (Strip) 8

ATLAS Muon Week in Seattle 30/June/04 Trigger Efficiency distorted by overlap in 2003 Triplet Low-p. T logic : 2 out-of- 3, 1 out-of-2 worked fine. Doublet Low-p. T logic: 3 out-of-4 did not work because 2 ineff. chambers. Overlap of wire supports in 2 Identical chambers for M 2 and M 3 9

2004 Preliminary Results (1) ATLAS Muon Week in Seattle 30/June/04 l The trigger efficiency problem was cured this year using correct chamber setup for doublets High Trigger Efficiencies for both doublet strip and wire obtained in this year 10

Preliminary Results (2) l Hp. T coincidence efficiency versus Chamber position Green: Trigger efficiency Red: Pt=6 ATLAS Muon Week in Seattle 30/June/04 Magenta: Pt=5 Blue: Pt=4 Cyan: Pt=3 Yellow: Pt=2 Black: Pt=1 11

Preliminary Results (3) ATLAS Muon Week in Seattle 30/June/04 l Hi-p. T and Sector Logic Trigger efficiencies versus PP ASIC Delay Current Bunch Hi-p. T Previous Sector Logic Next 12

ATLAS Muon Week in Seattle 30/June/04 MDT-TGC Combined Test l TGC has stable runs with MUCTPI and full readout chain, together with the MDT tracking chambers and their alignment. A trigger efficiency of 99. 5% was obtained with respect to reconstructed MDT tracks. 13

ATLAS Muon Week in Seattle 30/June/04 VERY Preliminary Result Summary l l Low p. T Trigger efficiency > 99. 5% High p. T Trigger efficiency > 98. 0% (~ SL efficiency) SL output and MUCTPI input match perfectly > 99. 99% Electronics components for both on- and off- detector worked reliably, no problem. l Test trial of Integration of a Condition Database worked fine. l Need some more time for results of Combined Test Beam Analysis. 14

ATLAS Muon Week in Seattle 30/June/04 Hardware Update Plan (July and Aug. ) for the Next Test Beam in Autumn l PS boards of nearly- production-version with updated SLB ASICs (proto. ver. 2 to ver. 4, which is final one but 1 known bug) l Production-version Hi-p. T boards with production version Hi-p. T ASICs (so far proto. ver. 3 has been used) + Anti-fuse FPGA l Nearly-final-design SSW boards (but FPGA is conventional one, Anti-fuse one will be mounted in the final one) 15