Temperature aware architecture of 14 nm Broadwell chipsets

Temperature aware architecture of 14 nm Broadwell chip-sets Dane Hylton

Transistors and heat •

Thermal Design Power (TDP) for Fanless 14 nm • TDP is an expression in watts of how much power the processor can dissipate without overheating. • Core M CPUs (Low voltage, laptops Fanless Designs) have low TDP. • TDP of 4. 5 W • Greater than 2 X reduction in TDP with better performance vs. Haswell-Y • TDP can tell how high a device can perform.

Dynamic Thermal Management •

SOC Power Reduction and Fin Improvement • • • Power = Active Power (Cdyn. V 2 F) + Leakage Power Dynamic capacitance reduction Cdyn GT/Cache Lower maximum temperature junction. Reduced number of fins for improved density and lower capacitance

Cooling solution TDP makes it possible to desing fanless devices. Less heat, less worry about cooling solutions The typical fanless laptops only use a heat spreader as a cooling solution.

References • Lee, J. (2015). Bulk Fin. FETs: Design at 14 nm Node and Key Characteristics. Nano Devices and Circuit Techniques for Low-Energy Applications and Energy Harvesting KAIST Research Series, 33 -64. doi: 10. 1007/978 -94 -017 -9990 -4_2 • Skadron, K. , Stan, M. R. , Sankaranarayanan, K. , Huang, W. , Velusamy, S. , & Tarjan, D. (2004). Temperature-aware microarchitecture. ACM Transactions on Architecture and Code Optimization, 1(1), 94 -125. doi: 10. 1145/980152. 980157 • Huang, W. , Allen-Ware, M. , Carter, J. B. , Stan, M. R. , Skadron, K. , & Cheng, E. (2011). Temperature-Aware Architecture: Lessons and Opportunities. IEEE Micro, 31(3), 82 -86. doi: 10. 1109/mm. 2011. 60 • Salami, B. , Baharani, M. , Noori, H. , & Mehdipour, F. (2014). Physical-aware task migration algorithm for dynamic thermal management of SMT multi-core processors. 2014 19 th Asia and South Pacific Design Automation Conference (ASP-DAC). doi: 10. 1109/aspdac. 2014. 6742905

References • Editorial Board. (2013). Sustainable Computing: Informatics and Systems, 3(1). doi: 10. 1016/s 2210 -5379(13)00015 -2 • Keshavarzi, A. , Somasekhar, D. , Rashed, M. , Ahmed, S. , Maitra, K. , Miller, R. , . . . Bartlett, G. (2011). Architecting advanced technologies for 14 nm and beyond with 3 D Fin. FET transistors for the future So. C applications. 2011 International Electron Devices Meeting. doi: 10. 1109/iedm. 2011. 6131485 • https: //www. intel. com/content/www/us/en/silicon-innovations/standards-14 nm-explainedvideo. html • https: //www. intel. com/content/www/us/en/processors/core/5 th-gen-core-family-datasheet -vol-1. html • https: //www. intel. com/content/www/us/en/silicon-innovations/advancing-moores-law-in 2014 -presentation. html • Intels Broadwell processor revealed. (n. d. ). Retrieved November 15, 2017, from http: //techreport. com/review/26896/intel-broadwell-processor-revealed/2