technology from seed Highly parallel programming with Transactional

Motivation • Multicore architectures are the norm • Manycores are on their way Instituto

Why parallel programming is hard technology from seed • TM simplifies the task of

Challenges of forking threads technology from seed • Forking a TM thread inccurs creation

Usually we have more available cores than application threads… technology from seed 2 Threads

technology from seed Is there any parallelism hidden inside each thread that the programmer

Motivational results technology from seed • RBTree – “contains” op, 1 TM thread, 2

Motivational results technology from seed • STMBench 7 – long Txs, 1 TM thread,

How do we explore intra-thread parallelism? Instituto de Engenharia de Sistemas e Computadores Investigação

I’m awesome! Divided my application into more TM threads! Instituto de Engenharia de Sistemas

Nested Transactional Memory technology from seed • Inner TM threads don’t run in parallel

Parallel Nested TM: Nepal. TM “Solving parallel nested transactions is complex and its efficient

Parallel Nested TM: Nepal. TM • First level of threads is managed with TM

Parallel Nested TM: XCilk technology from seed • Gives a provable performance guarantee for

Parallel Nested TM: Nes. TM technology from seed • Each version owner lock now

Undesirable features • Visible reads • Linear overhead • All operations are “writes” Instituto

I’m not that good. . . Help! Instituto de Engenharia de Sistemas e Computadores

Thread Level Speculation does some work for you Instituto de Engenharia de Sistemas e

Challenges of TLS • Non-optimal automatic code division Instituto de Engenharia de Sistemas e

Challenges of TLS • Non-optimal automatic code division • Mirror sequential code execution Instituto

Challenges of TLS • Non-optimal automatic code division • Mirror sequential code execution •

Thread Level Speculation • In-Place Write Commit Approaches – Each task commits when it

Thread Level Speculation • Serial Write Commit Approaches – Last task of the thread

Conclusions: So much untapped parallelism! technology from seed • Solve the problem of parallel

Questions? technology from seed rfilipe@gsd. inesc-id. pt www. gsd. inesc-id. pt Instituto de Engenharia

Slides: 29

Download presentation

technology from seed Highly parallel programming with Transactional Memory Ricardo Filipe João Barreto Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa

Motivation • Multicore architectures are the norm • Manycores are on their way Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa technology from seed

Why parallel programming is hard technology from seed • TM simplifies the task of synchronizing critical sections Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa

Why parallel programming is hard technology from seed • TM simplifies the task of synchronizing critical sections • …But forking code into threads is still hard Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa

Challenges of forking threads technology from seed • Forking a TM thread inccurs creation and management overheads Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa

Challenges of forking threads technology from seed • Forking a TM thread inccurs creation and management overheads • TM threads must be commutative Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa

Usually we have more available cores than application threads… technology from seed 2 Threads 4+ Cores. . . Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa

technology from seed Is there any parallelism hidden inside each thread that the programmer forks? Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa 8 9/20/2021

Motivational results technology from seed • RBTree – “contains” op, 1 TM thread, 2 TLS threads Speedup 0, 5 0, 4 0, 3 0, 2 0, 1 0 -0, 1 -0, 2 2 x contains 4 x contains 8 x contains Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa

Motivational results technology from seed • STMBench 7 – long Txs, 1 TM thread, 3 TLS threads Speedup 1 0, 8 0, 6 0, 4 0, 2 0 -0, 2 -0, 4 10% readonly 60% readonly 90% readonly Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa

How do we explore intra-thread parallelism? Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa technology from seed

I’m awesome! Divided my application into more TM threads! Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa technology from seed

Nested Transactional Memory technology from seed • Inner TM threads don’t run in parallel efficiently – Hinders expert programmers and libraries designed to run in TM Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa

Parallel Nested TM: Nepal. TM “Solving parallel nested transactions is complex and its efficient implementation appears to be questionable” Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa technology from seed

Parallel Nested TM: Nepal. TM • First level of threads is managed with TM • Deep nesting levels use mutual exclusion locks Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa technology from seed

Parallel Nested TM: XCilk technology from seed • Gives a provable performance guarantee for conflict free write-only TM parallel nested applications Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa

Parallel Nested TM: XCilk technology from seed • Gives a provable performance guarantee for conflict free write-only TM parallel nested apps • Introduces Lemma for conflicts in parallel nested TMs: Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa

Parallel Nested TM: Nes. TM technology from seed • Each version owner lock now has owner information always present for ancestor query • Uses a list to validate the ancestors read-sets on each write Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa

Undesirable features • Visible reads • Linear overhead • All operations are “writes” Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa technology from seed

I’m not that good. . . Help! Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa technology from seed

Thread Level Speculation does some work for you Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa technology from seed

Challenges of TLS • Non-optimal automatic code division Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa technology from seed

Challenges of TLS • Non-optimal automatic code division • Mirror sequential code execution Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa technology from seed

Challenges of TLS • Non-optimal automatic code division • Mirror sequential code execution • Trashes TM when simply used on top of it Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa technology from seed

Thread Level Speculation • In-Place Write Commit Approaches – Each task commits when it ends – Rollback goes to the task before the conflict Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa technology from seed

Thread Level Speculation • Serial Write Commit Approaches – Last task of the thread commits all writes – “Future tasks” can be waiting some time Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa technology from seed

Conclusions: So much untapped parallelism! technology from seed • Solve the problem of parallel nested transactions efficiently • Solve Thread Level Speculation on top of Transactional Memory adequately Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa

Questions? technology from seed rfilipe@gsd. inesc-id. pt www. gsd. inesc-id. pt Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa