Switched Capacitor DCDC Converters Topologies and Applications Bill
Switched Capacitor DC-DC Converters: Topologies and Applications Bill Tsang and Eddie Ng
Outline Motivations Dickson’s Charge Pump Other Various Charge Pumps Applications Conclusion
Motivations Inductorless On-chip integration Low cost High switching frequency Easy to implement (open-loop system) Fast transient but large ripple High efficiency but limited output power
Ideal Dickson’s Charge Pump(Phase 1) 2 VDD-Vt VDD-Vt 0 VDD • Clk=0, Clk_bar=VDD • Finite diode voltage drops, Vt
Ideal Dickson’s Charge Pump(Phase 2) 3 VDD-2 Vt 2 VDD-Vt 2 VDD-2 Vt VDD-Vt VDD 0 • Clk=VDD, Clk_bar=0 • Maximum voltage stress on diodes 2 VDD-Vt => reliability issue • Maximum voltage stress on capacitors VCn =n(VDD-Vt) => reliability issue
Dickson’s Charge Pump C 1=C 2=C 3=C (Body effect can be significant at later stages)
Non-idealities Threshold voltage drop [Mos charge pumps for low-voltage operation] Parasitic capacitor divider voltage drop Low conversion efficiency and pumping gain Limited maximum number of stages [An on-chip High-voltage generator circuit for EEPROMs with a power supply voltage below 2 V]
Modified Switch CTS • Static Charge Transfer Switches (CTS) • Eliminate transistor threshold drop
Modified Dickson’s Charge Pump #1 (NCP-1) Conditions: 1, Clk=Vdd, Clk_bar=0: v 2, v 3+ V To turn on transistor Ms 2; Vgs = 2 V 2, Clk=0, Clk_bar=VDD: v 1, v 2+ V, v 3 To turn off transistor Ms 2; Vgs = 2 V impossible
Modified Dickson’s Charge Pump #1 (NCP-1) Static Charge Transfer Switches (CTS) Better voltage pumping gain than diodes Lower voltage equals upper voltage of pervious stage Utilizing higher voltage from following stage to drive CTS Reverse charge sharing since CTS cannot turn off completely
Modified Switch #2 MN 1 used to turn off MS 1 MP 1 used to turn on MS 1 MN 1 MP 1 Next stage • Eliminate transistor threshold drop • Complete turn-off of switch, MS 1
Modified Dickson’s Charge Pump #2 (NCP-2) Conditions: 1, Clk=Vdd, Clk_bar=0: v 2, v 3+ V To turn on transistor MP 2 and MS 2; Vgs = 2 V 2, Clk=0, Clk_bar=VDD: v 1, v 2+ V, v 3 To turn on transistor MN 2 and turn off MS 2; Vgs = 2 V
Complete Circuit(NCP-2) • Careful PMOS well connection to prevent latch-up • Diode-connected output stage used
Modified Dickson’s Charge Pump #3 (NCP-3) NCP-3 uses boosted clock at output stage
Converters Output Voltage Results
Optimum Capacitance Selection [A Low-Ripple Switched-Capacitor DC-DC Up converter for Low-voltage applications]
Efficiency and Output Impedance Power loss due to: Vth, Rds(on), ESR, Cp, etc Efficiency estimation [Performance limits of switched-capacitor DC-DC Converter] M=ideal conversion ratio Output impedance (slow switching) [Performance limits of switched-capacitor DC-DC Converter] Ts=switching period i= parasitic time constant q=charge supplied to the source Vout
Cross-Coupled Charge Pump • PMOS to transmit 2 VDD to output • Bodies tied to source(highest voltage) to avoid forward biasing junction diodes [Area-efficient CMOS Charge Pumps for LCD Drivers]
H-bridge Topology Commercial products (Linear Technology, Fairchild, Maxim …) Buck or Boost functions Negative voltage generation
H-bridge Topologies Phase 1: transistors in red are on Phase 2: transistors in blue are on Vout = 2 Vin Vout = -Vin Vout = 0. 5 Vin
Application (1): Flash Memory Floating gate programming Control gate voltage >> Vdd [ee 141 lecture]
Application (1): Flash Memory Nominal VDD= 5 V
Application (2): Sample Switches S/H circuit– constant vgs sampling with all input level Voltage Reducesdoubler distortion Reduces Rds(on)
Application (3): Low voltage Amplifier Positive zero in Miller compensation 1/gm pole-zero cancellation [charge-pump assisted low-power/low-voltage CMOS Opamp Design] >2 VGS
Conclusion Different Dickson’s SC converters discussed Optimal Capacitor size selection Discussion of cross-coupled doublers Commercial product: Full H-bridge Applications: Flash, ADC, Amplifier, LCD driver
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