STACK and Stack Pointer Stack Definition and Characteristics

STACK and Stack Pointer

Stack Definition and Characteristics • Stack is a specialized memory segment which works in LIFO (Last In-First Out) mode. Managed by the Stack Pointer Register (SP) – Hardwired stack: physically defined, cannot change – Software defined: First address in stack defined by initialization of SP (by user or by compiler) • Stack Operations: – PUSH: storing a new data at the next available location – POP or PULL: retrieving last data available from the sequence (to be stored in some destination) – Important Note: A retrieved data is not deleted, but cannot be retrieved again with a stack operation • Top of Stack (TOS): memory address used in the stack operation (different for push or pop)

Basics of stack operation Push TOS X x x x x x Empty at start (Only garbagge)

Basics of stack operation PUSH (garbage not shown) Push TOS Pop TOS D 0

Basics of stack operation PUSH Push TOS Pop TOS D 0 D 1

Basics of stack operation PUSH Push TOS Pop TOS D 0 D 1 D 2

Basics of stack operation Push TOS Pop TOS D 0 D 1 D 2 POP

Basics of stack operation PUSH Push TOS Pop TOS D 0 D 1 D 3

Basics of stack operation Push TOS Pop TOS D 0 D 1 D 3 POP

Basics of stack operation Push TOS Pop TOS D 0 D 1 D 3 POP

Software Defined Stack Grows Downwards xxxx Push TOS xxxx D 0 xxxx-N xxxx-2 N xxxx-3 N xxxx-4 N Empty xxxx-N xxxx-2 N xxxx-3 N xxxx-4 N D 0 D 1 D 2 After a push Pop. TOS xxxx Push TOS xxxx-N xxxx-2 N xxxx-3 N xxxx-4 N After a push xxxx Pop. TOS Push TOS xxxx-N xxxx-2 N xxxx-3 N xxxx-4 N D 0 D 1 D 2 After a pop D 0 D 1 Pop. TOS Push TOS After a push xxxx Pop. TOS Push TOS xxxx-N xxxx-2 N xxxx-3 N xxxx-4 N D 0 D 1 D 3 After a push Pop. TOS Push TOS

Stack and Stack Pointer • The Stack Pointer contents is an address associated to the stack operation – The contents of SP is sometimes called Top-of. Stack • Since contents is unique, and two addresses are associated to the TOS, there are 2 possibilities: – SP contains the PUSH-TOS (Example: Freescale) – SP contains the POP TOS (Example: MSP 430)

SP points to PUSH TOS • To do a PUSH: – 1. Store (SP) Data D 0 – 2. Update SP - N D 1 • To do a POP: – 1. Update SP SP+N – 2. Retrieve Dest (SP) • These steps are done automatically by CPU. (SP+N) (SP) D 2 Pop. TOS Push TOS

SP points to POP TOS • To do a PUSH: – 1. Update SP -N D 0 – 2. Store (SP) Data D 1 • To do a POP: – 1. Retrieve Dest (SP) – 2. Update SP SP+N • These steps are done automatically by CPU. (SP) (SP-N) D 2 Pop. TOS Push TOS

Stack Pointer in MSP 430 • SP is register R 1 – It is always even, since the least significant bit is hardwired to 0 – There is an error if user tries to load an odd number onto SP • It points to the ‘last pushed item’ (first to pop) • N=2: That is, update is always +- 2. – If pushing a byte, the msb of the word becomes garbage

Important Remarks • Without any reference to the actual meaning of SP contents, and the fact that the address for pushing and pulling are different, the following conventions are generally adopted: – Contents of SP is called TOP-OF-STACK (TOS) – PUSH operation is denoted as (TOS) source – POP or PULL operation is denoted as dest (TOS) • You should be aware of differences!!

INSTRUCTION SET (PART 1) General Introduction

General Introduction (1) • Instruction operate with data or “addresses”. • Two items are needed to define an instruction: – Op. Code: What is the operation – Addressing mode: Where is data • Additional instruction operations may include size of operands or other modifiers.

General Introduction (2) • The maximum number of operands depend on system design – Most small microcontrollers work with two operands. Three is rare • The number and type of instructions depend on the MCU model – Most contain a common set or type

Operations types (1) • Data transfer (also called load or store): – Copy in destination a source dest source – Most transfers do not erase source. • Arithmetic and Logic Operations: – Of the type dest * operand 2, – Special case is when two destinations are needed – Logic operations may be bitwise

Instruction Types • Register operations: Shift, roll and rotation • Flow program operations: On execution, they modify the content of the PC register – Jump instructions PC New Address – Subroutine instructions: Call and Return – Interrupt instructions: Return from Interrupt.

Data Transfer Instructions • • • Move: dest source Push: (TOS) source Pop or Pull: dest (TOS) Input: dest (Input Port) Output: (Output port) Source Swap: dest <- - > source (exchange of contents; both operands are erase and reloaded)

Arithmetic instructions (1) Addition and Subtraction • Addition: dest + src – Addition with carry: dest + src + Carry Flag • Subtraction: Usually with two’s complement addition – Subtraction itself: dest – src – Subtraction with borrow : dest – src – BF or dest + NOT(src) + CF – Compare operation: dest – src; only flags affected

Arithmetic instructions (2) Multiplication and division • Not all microcontrollers’ ALU’s implement these operations. • Operands and destination sizes are of outmost importance. • Multiplication: dest x src – or dest 1 -dest x src • Division: dest 1 - dest 2 dest/src – dest 1 and dest 2 are for quotient and residue

Logic Instructions (1) • Bitwise and not bitwise – Most microcontrollers support only bitwise • Non bitwise logic operation principles: – Yield a boolean result (usually in a flag) – In source, “ 1” means operand is not zero; “ 0” means operand is zero – Used mainly in high performance systems or as part of “high level” instructions

Bitwise Logic Operations (1) • dest*source means dest(j)*source(j) • Bitwise operations permit individual bit manipulations • The source is usually called “mask” – “ 1”s in mask indicate which bits are to be affected • • AND: dest. AND. src OR: dest. OR. src XOR: dest. XOR. Src NOT: dest NOT(dest)

Bit manipulation : CLEAR 0. AND. X=0; 1. AND. X=X To clear specific bits in destination, the binary expression of the source has 0 at the bit positions to clear and 1 elsewhere

Bit manipulation : SET 0. OR. X=X; 1. OR. X=1 To set specific bits in destination, the binary expression of the source has 1 at the bit positions to set and 0 elsewhere

Bit manipulation : TOGGLE 0. XOR. X=X; 1. XOR. X=X’ To toggle specific bits in destination, the binary expression of the source has 1 at the bit positions to invert and 0 elsewhere

Shifts, rolls and rotates • Shift (or roll) right logically: – 0 dest(N-1) dest(N-2) …. dest(1) dest(0) CF • Shift left: – C dest(N-1) dest(N-2) …. dest(1) dest(0) 0 • Shift (or roll) right arithmetically: – Dest(N-1) dest(N-2) …. dest(1) dest(0) CF • Rotate right through: – CFold dest(N-1) dest(N-2) …. dest(1) dest(0) CF

Shift and rotate examples Carry Old X Carry 1 0 1 0 1 X 0 1 1 0 1 Shift right logically X 1 1 0 1 0 1 Shift right arithmetically X 0 1 1 0 1 0 1 Shift left A 0 1 1 0 1 A 1 Shift left with carry Original 1 0 1 0 1 A A 1 0 1 0 Original 1 rotate right through carry

Program Flow Instructions (1) Jumps or Branch - • ACTION: PC New. Address • Unconditional jumps: (jmp) – GOTO!!!!!! Ohhhhhhh!!!!!! • Conditional jumps: test a flag condition – Basic tools for decisions

Conditional jumps (simple flags) Conditional jump Jump if zero Jump if not zero Jump if carry Jump if not carry Jump if negative Jump if not negative Jump if overflow Jump if not overflow Condition Z=1 Z=0 C=1 C=0 N=1 N=0 V=1 V=0

Conditional jumps (After compare, for numeric decisions) Conditional jump Condition Note Jump if equal (= Jump if zero) Z=1 Jump if not equal (= Jump if not zero) Z=0 Jump if larger or equal (= Jump if carry) C=1 Unsigned numbers Jump if lower (= Jump if not carry) C=0 Unsigned numbers Jump if greater or equal N=V Signed numbers Jump if less N=0 Other combinations available …. . Signed numbers

Conditional jumps and decisions

Example 1: Delay loop

Example 2: Repeat process N times Counter N Label: Do process counter -1 Jump if not zero to Label

INSTRUCTION SET (Part 2) 1. Machine instructions

Machine Instruction • System “understands” only 0’s and 1’s. • A set of Word(s) processed in the instruction register becomes an instruction – The instruction may consists of one or several words – The first word is the INSTRUCTION WORD • The size of instruction words may be different or not, depending on CPU, IR, and if Harvard or Von Neumman architecture.

Instruction Word Structure • Op. Code: (Operating Code)Field of bits in the instruction word that indicates what operation is done • Operands and Addressing Modes Fields: Field(s) of bits indicating which operands are used in the transaction and where to find data. – Operands may be implicitly included (implicit operand) • The complete structure is CPU dependent.

EXAMPLE: MSP 430 INSTRUCTIONS (1/4 ) 1. General facts • Instructions are divided in four groups – Two-operand instructions (source and destination) – One-operand instructions (source OR destination) – Jump instructions (Operand is an offset) : implicit operand PC – Return from Interrupt (RETI) instruction: Implicit operands PC and SR: 1300 h • Note: TI user guides classify RETI as a one operand instruction

EXAMPLE: MSP 430 INSTRUCTIONS (2/4 ) 2. Two Operand Instructions • • Bits 15 -12: OP-CODE (4 to F) Bits 11 -8: Source info Bits 7 -4: Operands and addressing modes Bits 3 -0: Destination info

EXAMPLE: MSP 430 INSTRUCTIONS (3/4 ) 3. Single Operand Instructions • • Bits 15 -7: OP-CODE (Most significant nibble is 1) Bit 6: (W/B) 0 for word size operand, 1 for byte size Bits 5 -4: Addressing mode for operad Bits 3 -0: Operand info

EXAMPLE: MSP 430 INSTRUCTIONS (4/ 4) 4. Jump Instructions • • Bits 15 -13: OP-CODE Bit 12 -10: Condition statement (8 conditions) Bits 9 -0: 10 -bit signed offset for PC (-512 to 511) Notes: – Most significant nibble is 2 or 3 – To effectuate jump, PC + 2 (Offset) • Maximum jump size 1 K: -1, 024 to +1, 022

Instruction Set 2. Assembly language

Assembly Language Characteristics • Instructions in assembly language are “human friendly” notations for machine instructions – Each assembly language instruction corresponds to one machine instruction only, and viceversa • Components of instruction: – Mnemonics: associated to Op. Code (and other information in instruction) – Operands: Written in a special syntax form called Addressing Mode • IMPORTANT: Assembly is proper to microcontroller family.

Mnemonics examples for MSP 430 (1 a/3) Dual Operand Instructions Notes: 1. ****. w means that bit 6 (B/W) is 0. (Word size operands) 2. ****. b means that bit 6 (B/W) is 1. (Byte size operands) 3. Suffix w may be omitted (mov. w = mov)

Mnemonics examples for MSP 430 (2/3) Single Operand Instructions and RETI Instruction reti has no explicit operands, and only a 16 -bit opcode: 1300

Mnemonics for MSP 430 Instructions (1/3) Jump Instructions

Mnemonics for MSP 430 (4/6) “Reading” Mnemonics mov addc Reading move add with carry subtract with borrow subc/ sbb (carry) subtract cmp compare Mnemonics Reading dadd Decimal (BCD) addition with carry bit bic Bit Test Bit Clear bis Bit Set xor and X-OR AND

Mnemonics for MSP 430 (4/6) “Reading” Mnemonics Reading rotate right through carry swap bytes roll right arithmetically* Mnemonics sxt sign extend low byte jc/jhs push call reti push call Return from interrupt rrc swpb rra jnz/jneq jz/jeq jnc/jlo jn jge jl jmp Reading Jump if not zero/ if not equal Jump if zero/ if equal jump if no carry/if lower than jump if carry/ if higher or same jump if negative jump if greater or equal jump if less than jump unconditionally Note: rra is also read as “rotate right arithmetically, but in fact it does not rotate. It is also a ‘shift right arithmetically’

Types of Instructions (1/2) • Data Transfer: copy data from a source onto a destination [ dest src ] • Operations: Combine data from two operands according to an operation rule [dest src 1*src 2 or dest*src ] – – Arithmetic and Logic Bitwise Logic: Bit by bit [dest(j) * src(j) ] Compare and testing: affect flags but not operands Rotate and shift (roll): Displace bits internal to operand

Types of Instructions (2/2) • Program flow or Program Control: Change the default address of next instruction [PC New. Address] – Jump or branch instructions – Subroutine and interrupt handling instructions • Miscellaneous: not in previous categories – Example: No Operation – an instruction that actually does nothing but causes a delay.

Types of Instruction: Data Transfer General description MSP 430 Instructions • DATA TRANSFER: They copy a source onto a destination • DATA TRANSFER – – – move destination source push (TOS) source pop destination (TOS) Input dest (Input_port) Output (Output port) src mov src, dest; mov. b src, dest push src [ SP SP-2; (SP) source ] pop dest [ dest (SP); SP+2] Note: In MSP 430, pop is an emulated instruction

Types of Instruction: Operations General description MSP 430 Instructions • ARITHMETIC OPERATIONS: dest * srce • ARITHMETIC OPERATIONS add src, dest addc src, dest sub src, dest subc src, dest dadd src, dest (BCD addition including C flag) – Addition with carry • dest + src + C – – – Subtraction with borrow Multiplication Division