Solid State Amplifier Circuit Design Student Branko Popovic

Solid State Amplifier Circuit Design Student: Branko Popovic Advisor: Geoff Waldschmidt

Background § § § RF power to APS storage ring and booster cavities is supplied by 1. 1 MW CW klystrons operating at 352 MHz. Two klystrons supply RF power to the 16 storage ring cavities, and a third klystron supplies power to the booster cavities. Vendors are becoming increasingly difficult to find for replacement klystrons. Goal is to use 1 k. W solid state amplifier modules and combine to produce 200 k. W at each of the 16 cavities. Coaxial and waveguide combiners will be used to combine the individual modules to produce up to 200 k. W total output power. 352 -MHz/1. 1 MW CW klystron inside x-ray shield enclosure

Amplifier System Design § § § SOLEIL produced a 352 MHz solid state amplifier system that was commissioned in 2005 which uses 330 W amplifier modules. The APS has chosen to use the Freescale MRF 6 VP 41 KHR 6 device which produces 1 k. W CW per module at 352 MHz. 1 k. W modules were chosen to increase the output power density (W/m 2) for the available floor space in Bldg. 420. APS schematic 200 k. W assembly APS 4 -way, quarter-wave combiner

1 k. W Amplifier Module Design § Amplifiers typically consist of multiple stages connected in series – Predriver (Freescale MMG 3015 NT 1 with 100 m. W) – Driver (Freescale MRF 6 V 2010 N with 10 W Output) – Main Amplifier (Freescale MRF 6 VP 41 KHR 6 Device with 1 k. W Output) § § Noise is amplified as well as the desired signal. Low-noise transistors are needed in early stages of amplification The driver was the focus of much of the work done this summer 352 MHz 1 k. W main amplifier 352 MHz Driver amplifier Signal Generator Pre-Driver 100 m. W Driver 10 W Main Amplifier 1 k. W

Driver Amplifier Design § § § § § Create DC bias network. Determine device stability using S-parameter data. Perform harmonic balance analysis in order to account for nonlinear transistor behavior. Perform source and load pull analysis to determine the input and output matching networks. Create matching networks. Determine possible parasitic reactances in the microstrip trace and re-evaluate matching elements. Etch microstrip board - create transmission lines and DC feed. Create heat sink / ground plane. Solder DC leads, rf connectors, and lumped elements. Test and evaluate driver amplifier.

DC Bias Network § § § Desired gate and drain quiescent voltages are taken from the device datasheet Bias network may be a simple voltage divider. APS will use a temperature dependent bias circuit using an LM 723 integrated circuit to control the gate bias to prevent variation of the device gain. Inductors isolate rf from the DC network. Decoupling capacitors “short-out” any RF signals that makes it into the DC network Ferrite Beads absorb any additional rf power.

Determining Driver Stability with ADS Stabilized circuit schematic Feedback resistor § § § Unconditional stability across wide frequency band is desired to prevent device oscillation and failure. Driver is stabilized using a 120 Ohm feedback resistor in the input network. Unconditional Stability is achieved if one of the following conditions is satisfied: (1) μ≥ 1, or (2) K ≥ 1 and ∆ < 1. Stability plot of µ vs. frequency

Creating Matching Networks § § Matching networks are created based on the results from the Load/Source Pull analysis: Zsource= 6. 2 + j 28. 8; Zload = 35. 4 + j 28. 3. Lumped element inductors and capacitors are used for matching elements. Distributed elements such as microstrip transmission lines must be incorporated into the matching network. Matching networks may be created visually on the Smith chart. Various topologies may be investigated.

Input / Output Matching Circuits for Driver Amplifier Input Output

Hand-Wound Inductors § § 82 n. H inductors (Coilcraft) were not available in time for the driver circuit Hand-wound inductors were created from the equation below – Dimensions for length and diameter were taken from the datasheet of the replaced coil – Wound around a drill bit with the same diameter § Measured at about 90 n. H

Circuit Board Prototyping § § § Quick Circuit 3000 prototyper was used to etch the driver microstrip board. Microstrip layout was based on Freescale 220 MHz amplifier board which was determined to be suitable for 352 MHz. ISOPRO software was used to program the Quick Circuit to etch and drill the board. Circuit board prototyping setup Vias drilled by Quick Circuit with bailbars ISOPRO: Driver geometry with isolation and rubout areas Microstrip board (courtesy of Freescale)

Driver Prototype § § Board was brazed to a copper carrier to create a heat sink and enlarge the ground plane. Transistor was thermally connected to copper carrier with thermal grease. After successful operation, it will be soldered to carrier to improve thermal contact and improve DC contact between transistor source and ground. Driver Amplifier DC Feed Transistor RF Connector Input Matching Network Output Matching Network

Test and Measurement § § Function generator at 352 MHz was used for the rf input. 30 d. B commercial amplifier was used to amplify the signal from the function generator to 20 d. Bm into the driver amplifier. Separate DC supplies were used for the gate and drain voltages. Output power / gain is to be determined … Driver amplifier test setup 2. 6 V gate supply RF Input: 100 m. W 50 V drain supply DC Supplies Output load RF Output: ? ? ? 30 d. B commercial amplifier

Measurement results Driver amplifier was measured from 100 m. W to 10 W output. Gain was measured to be 19. 3 d. B compared with the simulated value of 20. 1 d. B. Driver efficiency was measured to be 48. 9% at 10. 4 W output power. Simulated drain efficiency was 50. 1%. Simulated: Driver Amplifier Gain Measurement: Driver Amplifier Gain (d. B) § § § Input Power (W)

Acknowledgements § § Geoff Waldschmidt Doug Horan Bruce Epperson RF Group

1 k. W Main Amplifier Design § § § Operating temperature effects reliability & lifetime. Solid state amplifiers must be at least as reliable as the existing klystrons in order to maintain the APS run-time statistics. Efficiency of amplifier > 62% Thermal image of output circuit of main amplifier Predicted MTTF of transistor vs. die temp

Harmonic Balance § § § Incorporates weakly nonlinear effects of the transistor. Output signal of the transistor can be represented as a Taylor power series. The spectral content of the output consists of a Fourier series of harmonics of the fundamental frequency. Fourier components of output

Source & Load Pull Analysis § § § A starting point on the Smith chart for the source and load pull analysis can be determined from the input/output impedance of a prototype board from the data sheet supplied by the manufacturer. For a load pull, the load’s reflection coefficient (as seen by the output of the active device) is varied to maximize power added efficiency (PAE), power delivered, etc. Similarly for a source pull. When near optimal impedances are determined, the output from the analysis consists of constant PAE and delivered power circles of increasing size around the starting point on the Smith chart. Load-pull circuit schematic PAE and delivered power constant circles Summary of peak PAE, gain and return loss

Parasitic Effects of Distributed Elements § § § Effects were determined to be minimal for this design (too low of a frequency) Parasitic inductances and capacitances are not significant. Higher frequencies would require a more detailed simulation of distributed element geometry. LNA design at 2. 4 GHz Parasitic inductance at the transistor source lead K. Payne, “Practical RF Amplifier Design”