Session 7 Sequence Generator A sequential circuit which

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Session 7

Session 7

Sequence Generator A sequential circuit which generates a prescribed sequence of bits in synchronism

Sequence Generator A sequential circuit which generates a prescribed sequence of bits in synchronism with a clock is referred to as a sequence generator.

 • Basic structure of sequence generator using counters is shown:

• Basic structure of sequence generator using counters is shown:

Sequence Generator

Sequence Generator

Block Diagram of sequence Generator

Block Diagram of sequence Generator

Sequence Generator • It is possible to design a sequence generator using 1)counter or

Sequence Generator • It is possible to design a sequence generator using 1)counter or 2)using shift registers.

Sequence Generator Using Flip-Flop • The next state decoder is a combinational circuit. The

Sequence Generator Using Flip-Flop • The next state decoder is a combinational circuit. The inputs to it are obtained from these flip-flops. Its output is applied to the input of the flip-flop.

 • Deciding No. Of Flip-Flop: 1. Based on the given sequence, we have

• Deciding No. Of Flip-Flop: 1. Based on the given sequence, we have to decide the no. of f/fs. 2. Count the no. of 1’s and 0’s in the given sequence. 3. Choose the higher no. from the two. Let this no. be ‘N’. 4. For EX. The no. of flip-flops is then calculated as N < 1 n 1 Sequence 1001 No of 1’S=2 No of 0’S=2 Hence selecting any higher of them. Here both are same so N=2 Hence N=2 n-1 so 2 < 2 n-1. Therefore no. of flip-flop N=2.

DESIGN 1) Determine the desired no of flip-flops. 2) Draw the state transition diagram

DESIGN 1) Determine the desired no of flip-flops. 2) Draw the state transition diagram showing all possible states. Including those is not part of the desired counting sequence. i. e consider that the unused states are returning back into the valid or used states, so as to avoid Lockout on power up. 3) Use the state transition diagram to set-up a table that list all Present states, & their Next state. (State Table) 4) Prepare State Transition Table 5) Select type of FF (J-K) 6) Use JK flip-flop excitation table & prepare a table to determine J&K input in order to provide desired present state to next state transition. 7) Prepare K-maps & get the equations in minimized form. 8) Draw required Logic circuit.