Sequential Logic Chapter 10 Introduction Bistables Memory Registers

Sequential Logic Chapter 10 § Introduction § Bistables § Memory Registers § Shift Registers § Counters § Monostables or one-shots § Astables § Timers Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 1

Introduction 10. 1 § Sequential logic elements combine the characteristics of combinational logic with memory § When constructing sequential logic our building blocks are often some form of multivibrator – a term used to describe a range of circuits § these have two outputs that are the inverse of each other § the output are labelled Q and § three basic forms: – bistables – monstables – astables Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 2

Bistables 10. 2 § The S-R latch (SET-RESET Latch) § when R = S = 0 – circuit stays in current state § when S = 1, R = 0 – Q is SET to 1 ( = 0) § when S = 0, R = 1 – Q is RESET to 0 ( = 1) § when S = 1, R = 1 – both outputs at 0 – not allowed Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 3

§ The S-R latch Circuit symbols Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 4

§ The S-R latch A waveform diagram Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 5

§ A design example - see Example 10. 1 in course text A Burglar Alarm – close all doors and window (closing switches) – open reset switch to initialise system – opening any of the door/window switches will activate alarm – alarm will continue if switch is then closed – alarm is silenced by opening reset switch Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 6

§ The D latch (Data Latch) Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 7

§ Edge-triggered devices – it is often necessary to synchronise many devices – this can be done using a clock input § such devices respond on a particular transition of the clock § these are called edge-triggered devices or flip-flops § can have positive-edge or negative-edge triggered devices Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 8

§ The D flip-flop – symbol as in previous slide – behaviour of positive-edge triggered device as below – Q becomes equal to D at the time of the trigger event Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 9

§ The J-K flip-flop – similar to S-R flip-flop but toggles when J = K = 1 Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 10

§ Asynchronous inputs – some flip-flops have asynchronous inputs Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 11

§ Propagation delays and races – real logic gates take a finite time to react – some circuits (as below) can suffer from race hazards where the operation of the circuit is uncertain § in this circuit the output depends on which devices is fastest Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 12

§ Pulse-triggered or master/slave bistables – these overcome race hazards by responding to the state of the inputs shortly before the clock trigger Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 13

Memory Registers 10. 3 § Combining a number of bistables we can construct a memory register – several forms of bistable can be used, for example: Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 14

§ Often we are not concerned with the internal construction of the register – they are a standard integrated component Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 15

Shift Registers 10. 4 § A slightly different configuration of bistables can produce a shift register Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 16

§ Behaviour of a shift register Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 17

§ An application of a shift register – in serial/parallel and parallel/serial conversion § used in serial communication Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 18

Counters 10. 5 § Ripple counters – can be constructed using several forms of bistable – consider the following arrangement – with J = K = 1 each bistable toggles on the falling edge of its clock input Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 19

§ Each stage toggles at half the frequency of the previous stage – acts as a frequency divider – divides frequency by 2 n (n is the number of stages) Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 20

§ Application of a frequency divider – see Example 10. 3 Clock generator for a digital watch – 15 -stage counter divides signal from a crystal oscillator by 32, 768 to produce a 1 Hz signal to drive stepper motor or digital display Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 21

§ Consider the pattern on the outputs of the counter shown earlier – displayed on the right § the outputs count in binary from 0 to 2 n-1 and then repeat – the circuit acts as a modulo-2 n counter – since the counting process propagates from one bistable to the next this is called a ripple counter – circuit shown is a 4 -bit or modulo-16 (or mod-16) ripple counter Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 22

§ Modulo-N counters – by using an appropriate number of stages the earlier counter can count modulo any power of 2 – to count to any other base we add reset circuitry – e. g. the modulo-10 or decade counter shown here Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 23

§ Down and up/down Counters – a slight modification to the earlier circuit will produce a counter that counts from 2 n-1 to 0 and then restarts – this is a down counter – a further modification can produce an up/down counter which counts up or down depending on the state of a control line (usually labelled ) § when this is 1 the counter counts up § when this is 0 the counter counts down Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 24

§ Propagation delay in counters – while ripple counters are very simple they suffer from problems at high speed – since the output of one flip-flop is triggered by the change of the previous device, delays produced by each flip-flop are summed along the chain – the time for a single device to respond is termed its propagation delay time t. PD – an n-bit counter will take n t. PD to respond – if read before this time the result will be garbled Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 25

§ Synchronous counters – these overcome the propagation delay in ripple counters by connecting all the flip-flops to the same clock signal – thus each stage changes state at the same time – additional circuitry is used to determine which stages change state on each clock pulse – faster than ripple counters but more complex – available in many forms including up, down, up/down and modulo-N counters Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 26

Monostables or one-shots 10. 6 § Monostables are another form of multivibrator – while bistables have two stable output states – monostables have one stable & one metastable states § when in its stable state Q = 0 § when an appropriate signal is applied to the trigger input (T ) the circuit enters its metastable state with Q = 1 § after a set period of time (determined by circuit components) it reverts to its stable state Circuit symbol § it is therefore a pulse generator Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 27

§ Monostables can be retriggerable or non-retriggerable Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 28

Astables 10. 7 § The last member of the multivibrator family is the astable – this has two metastable states – has the function of a digital oscillator – circuit spends a fixed period in each state (determined by circuit components) – if the period in each state is set to be equal, this will produce a square waveform Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 29

Timers 10. 8 § The integrated circuit timer can produce a range of functions – including those of a monostable or astable – various devices – one of the most popular is the 555 timer – can be configured using just a couple of external passive components – internal construction largely unimportant – all required information on using the device is in its data sheet Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 30

Key Points § Sequential logic circuits have the characteristic of memory § Among the most important groups of sequential components are the various forms of multivibrator – bistables – monostables – astables § The most widely used form is the bistable which includes – latches, edge-triggered flip-flops and master/slave devices § Registers form the basis of various memories § Counters are widely used in a range of applications § Monostables and astables perform a range of functions Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10. 31