Scheduling Proposals Scheduling Group Giulio Galante Wensheng Hua

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Scheduling Proposals Scheduling Group Giulio Galante, Wensheng Hua, Sundar Iyer, Isaac Keslassy, Pablo Molinero,

Scheduling Proposals Scheduling Group Giulio Galante, Wensheng Hua, Sundar Iyer, Isaac Keslassy, Pablo Molinero, Gireesh Shrimali, Rui Zhang

Round-Robin Non-Round-Robin Two-Stage Switch (I) Two-Stage Switch (II) Longer Packets

Round-Robin Non-Round-Robin Two-Stage Switch (I) Two-Stage Switch (II) Longer Packets

Input-Queued Packet Switch Scheduler 1, 1 i, j N, N Crossbar inputs 1. .

Input-Queued Packet Switch Scheduler 1, 1 i, j N, N Crossbar inputs 1. . N 1 outputs. . N

Round-Robin Scheduling

Round-Robin Scheduling

Round-Robin: main properties • Simple to implement • 100% throughput with uniform traffic Bad

Round-Robin: main properties • Simple to implement • 100% throughput with uniform traffic Bad throughput with non-uniform traffic

Non-Round-Robin Scheduling Too complex with a 100 Tbps router Up to 100% throughput •

Non-Round-Robin Scheduling Too complex with a 100 Tbps router Up to 100% throughput • Computation complexity: • Cell time = 64 B /160 Gbps = 3. 2 ns = one clock cycle (today, 50 ns ; MWM: N 3) • Ports: 625 (today, 32) • Communication complexity • Number of bidirectional links: 625 (today, 170) • Information flow rate: 0. 3 Gcells/s x 20 b/cell = 6 Gbps (today, 2. 5 Gbps)

Round-Robin Simple | No 100% throughput Non-Round-Robin 100% throughput | Complex Two-Stage Switch (I)

Round-Robin Simple | No 100% throughput Non-Round-Robin 100% throughput | Complex Two-Stage Switch (I) Two-Stage Switch (II) Longer Packets

Two-Stage Switch (I) External Inputs Internal Inputs External Outputs 1 1 1 N N

Two-Stage Switch (I) External Inputs Internal Inputs External Outputs 1 1 1 N N N First Round-Robin Second Round-Robin [C. S. Chang et al. : http: //www. ee. nthu. edu. tw/~cschang/Part. I. pdf]

Two-Stage Switch (I): main properties • Simple to implement • 100% throughput • Possibility

Two-Stage Switch (I): main properties • Simple to implement • 100% throughput • Possibility of using two sides of same mirrors Mis-sequencing!

Two-Stage Switch (II) New N 3 instead of N 2 [Paper under review: http:

Two-Stage Switch (II) New N 3 instead of N 2 [Paper under review: http: //klamath. stanford. edu/~keslassy/tmp/two-stage. pdf]

Two-Stage Switch (II): main properties • No missequencing • 100% throughput • Low average

Two-Stage Switch (II): main properties • No missequencing • 100% throughput • Low average delay (within a bound from “optimal” outputqueued switch) Idea not thoroughly studied: difficult implementation?

Round-Robin Simple | No 100% throughput Non-Round-Robin 100% throughput | Complex Two-Stage Switch (I)

Round-Robin Simple | No 100% throughput Non-Round-Robin 100% throughput | Complex Two-Stage Switch (I) 100% throughput, simple | Missequencing Two-Stage Switch (II) 100% throughput, no missequencing | Implementation? Longer Packets

Longer packets Variable-size packets [Tassiulas et al. : http: //www. glue. umd. edu/~koushik/hoti 00

Longer packets Variable-size packets [Tassiulas et al. : http: //www. glue. umd. edu/~koushik/hoti 00 -kkar. ps. gz]

Round-Robin Simple | No 100% throughput Non-Round-Robin 100% throughput | Complex Two-Stage Switch (I)

Round-Robin Simple | No 100% throughput Non-Round-Robin 100% throughput | Complex Two-Stage Switch (I) 100% throughput, simple | Missequencing Two-Stage Switch (II) Longer Packets 100% throughput, more time between computations | Implementation? 100% throughput, no missequencing | Implementation?

1. Crossbar

1. Crossbar

2. Multistage Networks Banyan Network (2 x 2) 2 Layers of kxk switches (100

2. Multistage Networks Banyan Network (2 x 2) 2 Layers of kxk switches (100 x 100)