Satish Pradhan Dnyanasadhana college Thane SUBJECTPHYSICS APPLIED COMPONENTII

Satish Pradhan Dnyanasadhana college, Thane SUBJECT-PHYSICS APPLIED COMPONENT-II Class- T. Y. B. Sc. SEM-VI TOPIC : Charged couple device Presented By Ms. Namrata A. Singh Dept. of Physics

Contents Introduction Concept Operation Basic Organisatio n

Introduction A charge-coupled device (CCD) is a device for the movement of electrical charge, usually from within the device to an area where the charge can be manipulated, for example conversion into a digital value. It is an array of MOS capacitors operating as a dynamic shift register. CCDs are simple, versatile and low cost devices. It is a major piece of technology in digital imaging.

Basic CCD Structure

Charged Coupled Devices

Concept Of CCD The basic device consists of a linear array of closely spaced control electrodes on a continuous silicon dioxide dielectric layer which covers the single-crystal silicon substrate material Each metallic electrode and substrate form a MOS capacitor. When we apply a positive voltage at the gate electrode then a depletion region is formed in the substrate. The charge constrained in the depletion region beneath a given electrode is called a charge packet. For analogue and memory devices, charge packets are introduced by applying suitable voltages to a p-n junction at the input of the CCD

Basic Structure Of CCD

Operation Of CCD Normally a 4 phase CCD shift register is operated using 4 clock waveforms. A 4 phase arrangement is required to give this dynamic flipflop the operating features of master slave flip-flop which allows shift register operation and assures that the data move in only one direction. During the time interval T 1, only Q 1 is at positive voltage so that depletion regions are formed only under Q 1. Here the charge Q 1 is injected either from an external source or from the preceding gate. During the interval T 2, the depletion under Q 1 gates remains as it is while new depletion regions are formed under Q 3 gates since the clock Q 3 goes positive. During interval T 3, the clock Q 1 & Q 3 are held positive as a result the charge is now able to spread throughout the extended region.

Operation Of CCD During interval T 4, the clock Q 1 becomes 0 thereby eliminating he depletion regions under the Q 1 gates. Similarly during interval T 5, the depletion region under Q 2 vanishes thereby pushing the charge towards Q 3. After 8 intervals, charge under Q 1 gate will shift to the next Q 1 gate. A special arrangement is required to be done to inject charge into the first depletion region and to detect its presence or absence of charge at the last depletion region. Also it is necessary to make provisions for refreshing the change at periodic intervals since charges are lost during the charge transfer.

Operation Of CCD

Basic Organisation Of CCD Any one of the 64 registers can be accessed by applying the appropriate 6 bit signal at the address inputs. Data in the shift registers is simultaneously shifted by using the 4 -phase clock signal. After a shift cycle, each of the 64 registers can be selected for an input/output operation by applying the appropriate 6 -bit address code. When addressed, one bit is written into or read from the memory. If the address input is fixed then as shifting progresses the bit positions in the addressed register will be presented serially for reading or writing. The output is open drain which allows wired OR connections. During the interval between shifts one can have access to a bit from each of the registers by changing the address. The 64 bits are available on a random basis. The 256 bits in a single register are available only in serial mode.