Review Transistor Bias Circuits By Syahrul Ashikin Azmi

Review Transistor Bias Circuits By: Syahrul Ashikin Azmi

Objectives Ø Discuss the concept of dc biasing of a transistor for linear operation Ø Analyze voltage-divider bias, base bias, and collector-feedback bias circuits. Ø Basic troubleshooting for transistor bias circuits

Lecture’s outline • • • Objectives Introduction DC operating point Voltage-divider bias Other bias methods – Base bias – Emitter bias – Collector-feedback bias • Troubleshooting • Summary

Introduction ØThe term biasing is used for application of dc voltages to establish a fixed level of current and voltage. ØTransistor must be properly biased with dc voltage to operate as a linear amplifier. ØIf amplifier is not biased with correct dc voltages on input and output, it can go into saturation or cutoff when the input signal applied. ØThere are several methods to establish DC operating point. ØWe will discuss some of the methods used for biasing transistors.

DC OPERATING POINT

The DC Operating Point • The goal of amplification in most cases is to increase the amplitude of an ac signal without altering it. • Improper biasing can cause distortion in the output signal.

The DC Operating Point The purpose of biasing a circuit is to establish a proper stable dc operating point (Q-point). The dc operating point between saturation and cutoff is called the Q-point. The goal is to set the Q-point such that it does not go into saturation or cutoff when an ac signal is applied.

• Q-point of a circuit: dc operating point of amplifier specified by voltage and current values (VCE and IC). These values are called the coordinates of Q-point. • Refer to figure a, given IB = 200μA and βDC=100. IC=βDCIB so IC=20 m. A and • Figure b, VBB is increased to produce IB of 300μA and IC of 30 m. A. • Figure c, VBB is increased to produce IB of 400μA and IC=40 m. A. So, VCE is: •

DC Operating Point-DC load line • Recall that the collector characteristic curves graphically show the relationship of collector current and VCE for different base currents. • When IB increases, IC increases and VCE decreases or vice-versa. Each separate Q-point is connected through dc load line. At any point along line, values of IB, IC and VCE can be picked off the graph. • Dc load line intersect VCE axis at 10 V, where VCE=VCC. This is cutoff point because IB and IC zero. Dc load line also intersect IC axis at 45. 5 m. A ideally. This is saturation point because IC is max and VCE=0.

DC Operating Point-Linear operation • Region between saturation and cutoff is linear region of transistor’s operation. The output voltage is ideally linear reproduction of input if transistor is operated in linear region. • Let’s look at the effect a superimposed ac voltage has on the circuit. IB vary sinusoidally 100μA above and below Q-point of 300μA. IC vary up and down 10 m. A of its Q-point(30 m. A). VCE varies 2. 2 V above and below its Q-point of 3. 4 V. • However, as you might already know, applying too much ac voltage to the base would result in driving the collector current into saturation or cutoff resulting in a distorted or clipped waveform. • When +ve peak is limited, transistor is in cutoff. When –ve peak is limited, transistor is in saturation.

Variations in IC and VCE as a result of variation in IB.

Graphical load line illustration of transistor being driven into saturation or cutoff

Graphical load line for transistor in saturation and cutoff

Example 1 • Determine Q-point in figure below and find the maximum peak value of base current for linear operation. Assume βDC=200.

VOLTAGE-DIVIDER BIAS

Voltage-Divider Bias • Voltage-divider bias is the most widely used type of bias circuit. Only one power supply is needed and voltage-divider bias is more stable( independent) than other bias types. For this reason it will be the primary focus for study. • dc bias voltage at base of transistor is developed by a resistive voltage-divider consists of R 1 and R 2. • Vcc is dc collector supply voltage. 2 current path between point A and ground: one through R 2 and the other through BE junction and RE.

Voltage divider bias • If IB is much smaller than I 2, bias circuit is viewed as voltage divider of R 1 and R 2 as shown in Figure a. • If IB is not small enough to be neglected, dc input resistance RIN(base) must be considered. RIN(base) is in parallel with R 2 as shown in figure b.

Input resistance at transistor base • VIN is between base and ground and IIN is the current into base. • By Ohm’s Law, RIN(base) = VIN / IIN • Apply KVL, VIN=VBE+IERE • Assume VBE<<IERE, so VIN≈IERE • Since IE≈IC=βDCIB, VIN≈ βDCIBRE • IN=IB, so RIN(base)= βDCIBRE / IB RIN(base) = DCRE

Analysis of Voltage-Divider Bias Circuit

Analysis of voltage divider bias circuit Ø Total resistance from base to ground is: Ø A voltage divider is formed by R 1 and resistance from base to ground in parallel with R 2. Ø If DCRE >>R 2, (at least ten times greater), then the formula simplifies to

Analysis of Voltage-Divider Bias Circuit • Now, determine emitter voltage VE. VE=VB – VBE • Using Ohm’s Law, find emitter current IE. IE = V E / R E • All the other circuit values IC ≈ I E VC = VCC – ICRC • To find VCE, apply KVL: VCC – ICRC – IERE – VCE =0 • Since IC ≈ IE, VCE ≈ VCC – IC (RC + RE)

Example 2 • Determine VCE and IC in voltage-divider biased transistor circuit below if βDC=100.

Thevenin’s Theorem Applied to Voltage-Divider Bias

Analysis of voltage bias for pnp transistor • Refer to slide 27 (c) • Thevenin’s voltage • Thevenin’s resistance • By KVL around BE loop,

Analysis of voltage bias for pnp transistor • Thus,

Voltage-Divider Bias for PNP Transistor Pnp transistor has opposite polarities from npn. To obtain pnp, required negative collector supply voltage or with a positive emitter supply voltage. The analysis of pnp is basically the same as npn.

Analysis of voltage bias for pnp transistor • Base voltage • Emitter voltage • By Ohm’s Law, • And,

Thevenin’s Theorem Applied to Voltage-Divider Bias • Refer to slide 30, (a) • Thevenin’s voltage • Thevenin’s resistance • By KVL around BE loop,

Analysis of voltage bias for pnp transistor • Thus,

Thevenin’s Theorem Applied to Voltage-Divider Bias • Refer to slide 30, (b) • Thevenin’s voltage • Thevenin’s resistance • By KVL around BE loop,

Analysis of voltage bias for pnp transistor • Thus,

OTHER BIAS METHODS q. BASE BIAS q. EMITTER BIAS q. COLLECTOR-FEEDBACK BIAS

Other bias methods - Base Bias • KVL apply on base circuit. VCC – VRB – VBE = 0 or VCC – IBRB – VBE =0 • Solving for IB, • Then, apply KVL around collector circuit. VCC – ICRC – VCE = 0 • We know that IC = βDCIB,

Base bias • From the equation of IC, note that IC is dependent on DC. When DC vary, VCE also vary, thus changing Q-point of transistor. • This type of circuit is beta-dependent and very unstable. Recall that DC changes with temperature and collector current. Base biasing circuits are mainly limited to switching applications.

Emitter Bias Npn transistor with emitter bias

Emitter base • This type of circuit is independent of DC making it as stable as the voltage-divider type. The drawback is that it requires two power supplies. • Apply KVL and Ohm’s Law, IBRB + IERE + VBE = -VEE • Since IC≈IE and IC= DC IB, • Solve for IE or IC, • Voltage equations for emitter base circuit. VE = VEE + IERE VB = VE + VBE VC = VCC – ICRC

Collector-Feedback Bias Collector-feedback bias is kept stable with negative feedback, although it is not as stable as voltage-divider or emitter. With increases of IC, VC decrease and causing decrease in voltage across RB, thus IB also decrease. With less IB , IC go down as well.

Analysis of collector-feedback circuit • By Ohm’s Law, • Collector voltage with assumption IC>>IB. VC = VCC – ICRC • And IB = IC / DC • So, collector current equation • Since emitter is ground, VCE = VCC - ICRC

TROUBLESHOOTING

Troubleshooting Figure below show a typical voltage divider circuit with correct voltage readings. Knowing these voltages is a requirement before logical troubleshooting can be applied. We will discuss some of the faults and symptoms.

All indicated faults

Troubleshooting Fault 1: R 1 Open Fault 2: Resistor RE Open With no bias the transistor is in cutoff. Transistor is in cutoff. Base voltage goes down to 0 V. Collector voltage goes up to 10 V(VCC). Emitter voltage goes down to 0 V. Base reading voltage will stay approximately the same. Since IC=0, collector voltage goes up to 10 V(VCC). Emitter voltage will be approximately the base voltage - 0. 7 V.

Troubleshooting Fault 3: Base lead internally open Transistor is nonconducting (cutoff), IC=0 A. Base voltage stays approximately the same, 3. 2 V. Collector voltage goes up to 10 V(VCC). Emitter voltage goes down to 0 V because no emitter current through RE. Fault 4: BE junction open Transistor is in cutoff. Base voltage stays approximately the same, 3. 2 V. Collector voltage goes up to 10 V(VCC) Emitter voltage goes down to 0 V since no emitter current through RE.

Troubleshooting Fault 5: BC junction open Base voltage goes down to 1. 11 V because of more base current flow through emitter. Collector voltage goes up to 10 V(VCC). Emitter voltage will drop to 0. 41 V because of small current flow from forward-biased base-emitter junction.

Troubleshooting Fault 6: RC open Base voltage goes down to 1. 11 V because of more current flow through the emitter. Collector voltage will drop to 0. 41 V because of current flow from forwardbiased collector-base junction. Emitter voltage will drop to 0. 41 V because of small current flow from forwardbiased base-emitter junction.

Troubleshooting Fault 7: R 2 open Transistor pushed close to or into saturation. Base voltage goes up slightly to 3. 83 V because of increased bias. Emitter voltage goes up to 3. 13 V because of increased current. Collector voltage goes down because of increased conduction of transistor.

SUMMARY

Summary Ø The purpose of biasing is to establish a stable operating point (Q-point). Ø The Q-point is the best point for operation of a transistor for a given collector current. Ø The dc load line helps to establish the Q-point for a given collector current. Ø The linear region of a transistor is the region of operation within saturation and cutoff.

Summary Ø Voltage-divider bias is most widely used because it is stable and uses only one voltage supply. Ø Base bias is very unstable because it is dependent. Ø Emitter bias is stable but require two voltage supplies. Ø Collector-back is relatively stable when compared to base bias, but not as stable as voltage-divider bias.