Reducing Power Density through Activity Migration Seongmoo Heo

Reducing Power Density through Activity Migration Seongmoo Heo, Kenneth Barr, and Krste Asanovic MIT Laboratory for Computer Science ISLPED ‘ 03

Outline • • • Introduction Thermal Model Activity Migration (AM) Experiment Validation Results Conclusion

Introduction • • What? Reduce power density (temperature) Why? Hot-spot limit performance How? AM (Duplicated component) Contribution : Prove AM is feasible. • Thermal model used to evaluate AM • Assume one hot-spot affect performance • Two cases: a(. 18) b(. 07)

Hot Spot • Heterogeneous structure results in spatial/temporal non-uniformity in power density • Low-Power design exacerbate non-uniformity • Partitioning by functional block.

Equivalent RC Model • At die level, heat conduction dominates temperature.

Simple Thermal Model 25 W*2 K/W + 300 K = 350 K 300 K 1 K/W

Thermal Model of Multiple Block

Block thermal resistance

Author’s Thermal Model

Vertical thermal resistance

Thermal Model

Thermal capacitance

Author’s Thermal Model

Temperature vs. Leakage

Author’s Thermal Model

Conceptual Benefits of AM

Pingpong model

Analytical Benefits

AM with DVS

AM Configuration

2 experiment attributes

Simple. Scaler Simulator

AM Penalty • • • Inactive core : data-preserving idle state. D-Cache shared : 1 cycle to access. I-Cache shared : 1 cycle to misprediction. Case D: 32 cycles for twice PP period. Added 1 cycle to branch misprediction. 2 D-Cache : 2 cycle * lines. Update dirty line before resumes. • Assume HW pingpong scheme.

SPEC 2000 Benchmark L 1 I-Cache miss for all cases are less than 1%

Performance effect

Area Effect

Conclusion • Reduce peak junction temperature. • Sustainable power dissipation can be increase. DVS achieve 16% performance. • AM cause 2% performance drop. • Peak die temperature reduce 12. 4°C • Min. Area overhead 6% for a processor.