Reconfigurable Hardware Thomas Polzer 0325077 1 Overview Definition

Reconfigurable Hardware Thomas Polzer 0325077 1

Overview Definition Methods Devices Applications Problems Hardware or Software? 2

Definition Configurable Hardware Already seen in previous talk A piece of hardware which can change its functionality according to a configuration. Configuration only changed by developer Reconfigurable Hardware Special kind of configurable hardware Configuration can be changed while device is operational 3

FPGA Layout Source: [4] 4

Methods (I) Complete Reconfiguration Whole configuration updated Normally done by operator/developer Device must be reinitialized Partial Reconfiguration Difference based Module base 5

Methods (II) Difference Based Partial Reconfiguration New and old configuration compared Only changes are reprogrammed Whole column reprogrammed 6

Methods (III) Module Based Partial Reconfiguration Design partitioned into modules Each module can be replaced in runtime Other modules stay operational Size and shape Whole column Rectangle Special interfaces between modules 7

Methods (IV) Source: [1] 8

Methods (V) Controller internal external Source: [2] 9

Devices (I) Xilinx Spartan-3 series Complete reconfiguration (only A and E series) Difference based partial reconfiguration Virtex series Complete reconfiguration Difference based partial reconfiguration Module based partial reconfiguration 1 0

Devices (II) Altera Stratix series Cyclone series Complete reconfiguration Atmel Field Programmable System Level Integrated Circuits (FPSLIC) Complete reconfiguration Module based partial reconfiguration 1 1

Devices (III) Lattice ORCA series Complete Difference based partial reconfiguration Module based partial reconfiguration 1 2

Applications (I) Increased Fault Tolerance Monitoring of functional units In case of failure -> reconfigure empty space to replace it Increased Capacity Not all functional units deployed simultaneously Remote Update Download a new configuration via serial line or network 1 3

Applications (II) Speed-Up Special modules loaded on demand Modules depending on task Reduction of power consumption Not all modules active Inactive modules are not deployed No power consumption by that modules 1 4

Problems Corrupted Configuration Data Possible solution: Fall back configuration Security Unauthorized changes to hardware “Stealing” of the configuration Safety New layer of complexity Harder to test Harder to guarantee correctness Unwanted reconfigurations 1 5

Hardware/Software Why it is Hardware Still a system of logic gates Inherent parallelism remains Short execution time Why it is Software Has all the dynamic properties of software Adaption to specific problems at runtime Adaptive algorithms Partly sequential operation Easy to update 1 6

End Thank you for your attention! 1 7

References 1 - Xilinx Application Note 290 2 - Hiibner, Schuck, Kiihnle, Becker - New 2 -dimensional partial dynamic reconfiguration techniques for real-time adaptive microelectronic circuits - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures, 2006 3 – AT 94 S 40 AL datasheet 4 - Sedcole, Blodget, Becker, Anderson, Lysaght - Modular dynamic reconfiguration in Virtex FPGAs IEEE Proc. -Comput. Digit. Tech. , Vol. 153, No. 3, May 2006 5 - Emmert, Stroud, Skaggs - Dynamic Fault Tolerance in FPGAs via Partial Reconfiguration 6 - ORCA Series 3 C and 3 T FPGAs Data Sheet 7 – Amir H. Sheikh Zeineddini - Secure Partial Reconfiguration of FPGAs – Master Thesis - 2005 1 8