Recitation 2 PM0 Code Execution COP 3402 Fall

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Recitation 2 PM/0 Code Execution COP 3402 (Fall 2014)

Recitation 2 PM/0 Code Execution COP 3402 (Fall 2014)

Important notes • This PM/0 example doesn’t match the PM/0 that you must implement

Important notes • This PM/0 example doesn’t match the PM/0 that you must implement for HW 1. • Opcodes, instruction names and activation record may be different. • When in doubt, follow the assignment or ask a TA.

P-machine code PC IR PC 0 BP 1 SP 0 CPU Program instructions. Read

P-machine code PC IR PC 0 BP 1 SP 0 CPU Program instructions. Read only. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 jmp jmp inc lod sto opr inc lit sto cal opr inc 0 0 0 2 1 0 0 0 0 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 stack SP 1 0 2 0 3 0 Program data. Read-Write. BP

P-machine Copy of current instruction code on execution PC 0 jmp 0 IR PC

P-machine Copy of current instruction code on execution PC 0 jmp 0 IR PC 0 BP 1 CPU SP 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 jmp jmp inc lod sto opr inc lit sto cal opr inc 0 0 2 1 0 0 0 0 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 stack SP 1 0 2 0 3 0 “Working place” in stack. Current AR in stack. Next instruction in code. BP

P-machine ISA opcode 02 - OPR: RTN 0, 0 Return operation (i. e. return

P-machine ISA opcode 02 - OPR: RTN 0, 0 Return operation (i. e. return from subroutine) OPR OPR 0, 1 0, 2 0, 3 0, 4 0, 5 0, 6 0, 7 NEG ( - stack[sp] ) ADD (sp sp – 1 and stack[sp] + stack[sp + 1]) SUB (sp sp – 1 and stack[sp] - stack[sp + 1]) MUL (sp sp – 1 and stack[sp] * stack[sp + 1]) DIV (sp sp – 1 and stack[sp] div stack[sp + 1]) ODD (stack[sp] stack mod 2) or ord(odd(stack[sp])) MOD (sp sp – 1 and stack[sp] mod stack[sp + 1]) OPR OPR OPR 0, 8 EQL 0, 9 NEQ 0, 10 LSS 0, 11 LEQ 0, 12 GTR 0, 13 GEQ (sp sp – 1 and stack[sp] = =stack[sp + 1]) (sp sp – 1 and stack[sp] != stack[sp + 1]) (sp sp – 1 and stack[sp] <= stack[sp + 1]) (sp sp – 1 and stack[sp] >= stack[sp + 1])

opcode 01 - LIT P-machine ISA 0, M sp +1; stack[sp] M; 02 –

opcode 01 - LIT P-machine ISA 0, M sp +1; stack[sp] M; 02 – RTN 0, 0 sp bp -1; pc stack[sp + 3]; bp stack[sp + 2]; 03 – LOD L, M sp +1; stack[sp] stack[ base(L, BP) + M]; 04 – STO L, M stack[ base(L, BP) + M] stack[sp]; sp -1;

opcode P-machine ISA 05 - CAL L, M stack[sp + 1] base(L); stack[sp +

opcode P-machine ISA 05 - CAL L, M stack[sp + 1] base(L); stack[sp + 2] bp; stack[sp + 3] pc bp sp + 1; pc M; 06 – INC 0, M sp + M; 07 – JMP 0, M pc = M; 08 – JPC 0, M if stack[sp] == 0 then { pc M; sp - 1; } 09 – SIO 0, 0 print (stack[sp]); sp – 1; /* static link (SL) /* dynamic link (DL) /* return address (RA)

Nested Code procedure A; var y; procedure B; var x; procedure C; begin x:

Nested Code procedure A; var y; procedure B; var x; procedure C; begin x: =y; end; begin x: =1; y: = 3; call C; end; begin y: = 2; call B; end; call A. code 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 RTN 0, 0 sp bp -1; pc stack[sp + 3]; bp stack[sp + 2];

Running Nested Code on PM/0

Running Nested Code on PM/0

SP code PC Initial State IR PC 0 BP 1 CPU SP 0 0

SP code PC Initial State IR PC 0 BP 1 CPU SP 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 stack 1 0 2 0 3 0 BP

SP code PC After FETCH, no execution yet! IR PC 1 jmp 0 20

SP code PC After FETCH, no execution yet! IR PC 1 jmp 0 20 BP 1 CPU SP 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 stack 1 0 2 0 3 0 BP

SP code After EXECUTION IR PC 20 jmp 0 20 BP 1 SP 0

SP code After EXECUTION IR PC 20 jmp 0 20 BP 1 SP 0 CPU PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 stack 1 0 2 0 3 0 BP

code After FETCH IR PC 21 inc 0 3 BP 1 SP 0 CPU

code After FETCH IR PC 21 inc 0 3 BP 1 SP 0 CPU PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 BP

code After EXECUTION IR PC 21 inc 0 3 BP 1 SP 3 CPU

code After EXECUTION IR PC 21 inc 0 3 BP 1 SP 3 CPU PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 BP We “reserve space” for some data by incrementing the SP.

code After FETCH IR PC 22 cal 0 15 BP 1 SP 3 CPU

code After FETCH IR PC 22 cal 0 15 BP 1 SP 3 CPU PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 BP CAL L, M stack[sp + 1] base(L); stack[sp + 2] bp; stack[sp + 3] pc bp sp + 1; pc M;

code Executing CAL IR PC 22 cal 0 15 BP 1 SP 3 CPU

code Executing CAL IR PC 22 cal 0 15 BP 1 SP 3 CPU PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 BP CAL L, M stack[sp + 1] base(L); stack[sp + 2] bp; stack[sp + 3] pc bp sp + 1; pc M;

code Executing CAL IR PC 22 cal 0 15 BP 1 SP 3 CPU

code Executing CAL IR PC 22 cal 0 15 BP 1 SP 3 CPU PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 BP CAL L, M stack[sp + 1] base(L); stack[sp + 2] bp; stack[sp + 3] pc bp sp + 1; pc M;

code Executing CAL IR PC 22 cal 0 15 BP 1 SP 3 CPU

code Executing CAL IR PC 22 cal 0 15 BP 1 SP 3 CPU PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 BP CAL L, M stack[sp + 1] base(L); stack[sp + 2] bp; stack[sp + 3] pc bp sp + 1; pc M;

code Executing CAL IR PC 22 cal 0 15 BP 4 SP 3 CPU

code Executing CAL IR PC 22 cal 0 15 BP 4 SP 3 CPU PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 BP CAL L, M stack[sp + 1] base(L); stack[sp + 2] bp; stack[sp + 3] pc bp sp + 1; pc M;

code Executing CAL IR PC 15 cal 0 15 BP 4 CPU SP 3

code Executing CAL IR PC 15 cal 0 15 BP 4 CPU SP 3 PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 BP CAL L, M stack[sp + 1] base(L); stack[sp + 2] bp; stack[sp + 3] pc bp sp + 1; pc M;

code After Execution… IR PC 15 CPU jmp jmp inc lod sto opr inc

code After Execution… IR PC 15 CPU jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 Activation Record cal 0 15 BP 4 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 stack SP 3 PC SP 1 0 2 0 3 0 4 1 5 1 6 22 BP From now on, we’ll only show the result after the instruction have been executed.

code IR PC 16 inc 0 4 BP 4 CPU SP 7 PC 0

code IR PC 16 inc 0 4 BP 4 CPU SP 7 PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 0 BP We are “reserving space” for activation record and one variable.

code IR PC 17 lit 0 2 BP 4 CPU SP 7 PC 0

code IR PC 17 lit 0 2 BP 4 CPU SP 7 PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 0 8 2 BP

code IR PC 18 sto 0 3 BP 4 SP 7 CPU PC 0

code IR PC 18 sto 0 3 BP 4 SP 7 CPU PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 2 8 2 BP STO L, M stack[base(L, BP)+M] stack[sp]; sp sp – 1;

code IR PC 8 cal 0 8 BP 8 CPU PC SP 7 0

code IR PC 8 cal 0 8 BP 8 CPU PC SP 7 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 2 8 4 9 4 10 19 BP CAL L, M stack[sp + 1] base(L); stack[sp + 2] bp; stack[sp + 3] pc bp sp + 1; pc M;

code IR inc 0 4 PC PC 9 BP 8 CPU SP 11 0

code IR inc 0 4 PC PC 9 BP 8 CPU SP 11 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 2 8 4 9 4 10 19 11 0 BP

code IR lit 0 1 PC PC 10 BP 8 CPU SP 12 0

code IR lit 0 1 PC PC 10 BP 8 CPU SP 12 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 2 8 4 9 4 10 19 11 0 12 1 BP

code IR PC 11 sto 0 3 BP 8 CPU SP 11 PC 0

code IR PC 11 sto 0 3 BP 8 CPU SP 11 PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 2 8 4 9 4 10 19 11 1 12 1 BP

code IR PC 12 lit 0 3 BP 8 CPU SP 12 PC 0

code IR PC 12 lit 0 3 BP 8 CPU SP 12 PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 2 8 4 9 4 10 19 11 1 12 3 BP

code IR PC 13 sto 1 3 BP 8 CPU SP 11 PC 0

code IR PC 13 sto 1 3 BP 8 CPU SP 11 PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 3 8 4 9 4 10 19 11 1 12 3 BP

code PC IR PC 4 cal 0 4 BP 12 CPU SP 11 0

code PC IR PC 4 cal 0 4 BP 12 CPU SP 11 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 3 8 4 9 4 10 19 11 1 12 8 13 8 14 14 BP

code PC IR PC 5 inc 0 3 BP 12 CPU SP 14 0

code PC IR PC 5 inc 0 3 BP 12 CPU SP 14 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 3 8 4 9 4 10 19 11 1 12 8 13 8 14 14 BP

code PC IR PC 6 lod 2 3 BP 12 CPU SP 15 0

code PC IR PC 6 lod 2 3 BP 12 CPU SP 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 3 8 4 9 4 10 19 11 1 12 8 13 8 14 14 15 3 BP

code IR PC 7 PC sto 1 3 BP 12 CPU RTN 0, 0

code IR PC 7 PC sto 1 3 BP 12 CPU RTN 0, 0 sp bp-1; pc stack[sp+3]; bp stack[sp+2]; SP 14 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 3 8 4 9 4 10 19 11 3 12 8 13 8 14 14 15 3 BP

code IR PC 14 opr 0 0 BP 8 CPU RTN 0, 0 sp

code IR PC 14 opr 0 0 BP 8 CPU RTN 0, 0 sp bp-1; pc stack[sp+3]; bp stack[sp+2]; SP 11 PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 3 8 4 9 4 10 19 11 3 12 8 13 8 14 14 15 3 BP

code IR PC 19 opr 0 0 BP 4 SP 7 CPU RTN 0,

code IR PC 19 opr 0 0 BP 4 SP 7 CPU RTN 0, 0 sp bp-1; pc stack[sp+3]; bp stack[sp+2]; PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 3 8 4 9 4 10 19 11 3 12 8 13 8 14 14 15 3 BP

code IR PC 22 opr 0 0 BP 1 SP 3 CPU RTN 0,

code IR PC 22 opr 0 0 BP 1 SP 3 CPU RTN 0, 0 sp bp-1; pc stack[sp+3]; bp stack[sp+2]; PC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 stack 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 SP 1 0 2 0 3 0 4 1 5 1 6 22 7 3 8 4 9 4 10 19 11 3 12 8 13 8 14 14 15 3 BP

SP code PC IR PC 0 opr 0 0 BP 0 CPU RTN 0,

SP code PC IR PC 0 opr 0 0 BP 0 CPU RTN 0, 0 sp bp-1; pc stack[sp+3]; bp stack[sp+2]; SP 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 jmp jmp inc lod sto opr inc lit sto cal opr inc cal opr 0 0 0 2 1 0 0 0 0 20 15 8 4 3 3 3 0 4 1 3 3 3 4 0 4 2 3 8 0 3 15 0 End State. Halt P-Machine stack 1 0 2 0 3 0 4 1 5 1 6 22 7 3 8 4 9 4 10 19 11 3 12 8 13 8 14 14 15 3 BP

Factorial Code var f, n; procedure fact; var ans 1; begin ans 1: =n;

Factorial Code var f, n; procedure fact; var ans 1; begin ans 1: =n; n: = n-1; if n = 0 then f : = 1; if n > 0 then call fact; f: =f * ans 1; end; begin n: =3; call fact; write(f); end. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 jmp inc lod sto lod lit opr jpc lit sto lod lit opr jpc cal lod opr sto opr inc lit sto cal lod wrt opr 0 0 0 1 1 0 0 0 1 1 0 0 0 0 0 25 2 4 4 3 4 1 3 4 4 0 8 15 1 3 4 0 12 20 2 3 3 4 3 0 5 3 4 2 3 0 0

Running Factorial on PM/0 Initial values pc 0 bp sp 1 0 stack 000

Running Factorial on PM/0 Initial values pc 0 bp sp 1 0 stack 000 0 jmp 0, 25 25 inc 0, 5 26 lit 0, 3 27 sto 0, 4 28 cal 0, 2 2 inc 0, 4 3 lod 1, 4 4 sto 0, 3 5 lod 1, 4 6 lit 0, 1 7 opr 0, 3 8 sto 1, 4 9 lod 1, 4 10 lit 0, 0 11 opr 0, 8 25 26 27 28 2 3 4 5 6 7 8 9 10 11 12 1 1 6 6 6 000003 0 0 0 0 3| 1 1 29 0 3 0 0 0 0 3| 1 1 29 3 3 1 0 0 3| 1 1 29 3 2 0 0 0 0 2| 1 1 29 3 2 0 0 0 2| 1 1 29 3 0 0 5 6 5 5 9 10 11 10 code 0 jmp 0 25 1 jmp 0 2 2 inc 0 4 3 lod 1 4 4 sto 0 3 5 lod 1 4 6 lit 0 1 7 opr 0 3 8 sto 1 4 9 lod 1 4 10 lit 0 0 11 opr 0 8 12 jpc 0 15 13 lit 0 1 14 sto 1 3 15 lod 1 4 16 lit 0 0

Running a program on PM/0 Initial values pc 0 bp sp 1 0 stack

Running a program on PM/0 Initial values pc 0 bp sp 1 0 stack 000 12 jpc 0, 15 1 lod 1, 4 2 lit 0, 0 17 opr 0, 12 18 jpc 0, 20 19 cal 1, 2 2 inc 0, 4 3 lod 2, 4 4 sto 0, 3 5 lod 2, 4 6 lit 0, 1 7 opr 0, 3 8 sto 2, 4 9 lod 2, 4 10 lit 0, 0 15 16 17 18 19 2 3 4 5 6 7 8 9 10 11 6 6 6 10 10 10 0 0 0 0 2| 1 1 29 3 2 0 0 0 2| 1 1 29 3 1 0 0 0 0 2| 1 1 29 3| 1 6 20 0 2 0 0 0 0 2| 1 1 29 3| 1 6 20 2 2 1 0 0 2| 1 1 29 3| 1 6 20 2 1 0 0 0 0 1| 1 1 29 3| 1 6 20 2 1 0 9 10 11 10 9 9 13 14 15 14 13 14 15 code 17 opr 0 12 18 jpc 0 20 19 cal 1 2 20 lod 1 3 21 lod 0 3 22 opr 0 4 23 sto 1 3 24 opr 0 0 25 inc 0 5 26 lit 0 3 27 sto 0 4 28 cal 0 2 29 lod 0 3 30 wrt 0 0 31 opr 0 0

Running a program on PM/0 Initial values pc 0 bp sp 1 0 stack

Running a program on PM/0 Initial values pc 0 bp sp 1 0 stack 000 11 opr 0, 8 1 jpc 0, 15 15 lod 2, 4 16 lit 0, 0 17 opr 0, 12 18 jpc 0, 20 19 cal 1, 2 2 inc 0, 4 3 lod 3, 4 4 sto 0, 3 5 lod 3, 4 6 lit 0, 1 7 opr 0, 3 8 sto 3, 4 9 lod 3, 4 12 15 16 17 18 19 2 3 4 5 6 7 8 9 10 10 14 14 14 0 0 0 0 1| 1 1 29 3| 1 6 20 2 1 0 0 0 1| 1 1 29 3| 1 6 20 2 1 0 0 0 0 1| 1 1 29 3| 1 6 20 2| 1 10 20 0 1 0 0 0 0 1| 1 1 29 3| 1 6 20 2| 1 10 20 1 0 0 0| 1 1 29 3| 1 6 20 2| 1 10 20 1 0 14 13 14 15 14 13 13 17 18 19 18 17 18

Running a program on PM/0 Initial values pc 0 bp sp 1 0 stack

Running a program on PM/0 Initial values pc 0 bp sp 1 0 stack 000 10 lit 0, 0 11 opr 0, 8 12 jpc 0, 15 13 lit 0, 1 14 sto 3, 3 15 lod 3, 4 16 lit 0, 0 17 opr 0, 12 18 jpc 0, 20 20 lod 3, 3 21 lod 0, 3 22 opr 0, 4 23 sto 3, 3 24 opr 0, 0 20 lod 2, 3 11 12 13 14 15 16 17 18 20 21 22 23 24 20 21 14 14 14 14 10 10 0 0 0| 1 1 29 3| 1 6 20 2| 1 10 20 1 1 0 0 0 0 0| 1 1 29 3| 1 6 20 2| 1 10 20 1 1 0 0 0 1 0| 1 1 29 3| 1 6 20 2| 1 10 20 1 0 0 0 0 1 0| 1 1 29 3| 1 6 20 2| 1 10 20 1 1 0 0 0 1 0| 1 1 29 3| 1 6 20 2| 1 10 20 1 0 0 0 1 0| 1 1 29 3| 1 6 20 2 1 19 18 17 18 19 18 17 13 14

Running a program on PM/0 Initial values pc 0 bp sp 1 0 1

Running a program on PM/0 Initial values pc 0 bp sp 1 0 1 lod 0, 3 2 opr 0, 4 • sto 2, 3 • opr 0, 0 20 lod 1, 3 21 lod 0, 3 22 opr 0, 4 23 sto 1, 3 24 opr 0, 0 29 lod 0, 3 30 wrt 0, 0 31 opr 0, 0 22 10 15 23 10 14 24 10 13 20 6 9 21 6 10 22 6 11 23 6 10 24 6 9 29 1 5 30 1 6 31 1 5 0 0 0 stack 000 0 1 0| 1 1 29 3| 1 6 20 2 1 2 0 0 0 1 0| 1 1 29 3| 1 6 20 2 2 0 0 0 2 0| 1 1 29 3| 1 6 20 2 0 0 0 2 0| 1 1 29 3 2 3 0 0 0 2 0| 1 1 29 3 6 0 0 0 6 0| 1 1 29 3 000606 00060

Recitation 2 PL0 Code Execution COP 3402 SpringRecitation 2 PL0 Code Execution COP 3402 Spring
Recitation 2 PL0 Code Execution COP 3402 SummerRecitation 2 PL0 Code Execution COP 3402 Summer
Recitation 2 PL0 Code Execution COP 3402 SpringRecitation 2 PL0 Code Execution COP 3402 Spring
Recitation 2 PL0 Code Execution COP 3402 SprRecitation 2 PL0 Code Execution COP 3402 Spr
Recitation 3 PM0 PMachine with registers PL0 CodeRecitation 3 PM0 PMachine with registers PL0 Code
Recitation 2 PM0 PMachine with registers PL0 CodeRecitation 2 PM0 PMachine with registers PL0 Code
Lecture 2 PL0 Code Execution COP 3402 SpringLecture 2 PL0 Code Execution COP 3402 Spring
Procedures Code Generation COP 3402 System Software FallProcedures Code Generation COP 3402 System Software Fall
COP 3402 System Software Recitation Notes 2 ndCOP 3402 System Software Recitation Notes 2 nd
COP 3402 Systems Software Recitation Notes November 9COP 3402 Systems Software Recitation Notes November 9
Parser Code Generation COP 3402 System Software SpringParser Code Generation COP 3402 System Software Spring
Parser Code Generation COP 3402 System Software SummerParser Code Generation COP 3402 System Software Summer
Procedures Code Generation COP 3402 Software Systems SpringProcedures Code Generation COP 3402 Software Systems Spring
Procedures Code Generation Part 2 COP 3402 SystemProcedures Code Generation Part 2 COP 3402 System
Procedures Code Generation COP 3402 Software Systems SummerProcedures Code Generation COP 3402 Software Systems Summer
Lecture 1 SIC Architecture COP 3402 Fall 2007Lecture 1 SIC Architecture COP 3402 Fall 2007
Systems Software Charles E Hughes COP 3402 FallSystems Software Charles E Hughes COP 3402 Fall
Symbol Table Construction COP 3402 System Software FallSymbol Table Construction COP 3402 System Software Fall
Symbol Tables COP 3402 System Software Fall 2014Symbol Tables COP 3402 System Software Fall 2014
PL0 Parser COP 3402 System Software Fall 2014PL0 Parser COP 3402 System Software Fall 2014
Systems Software Charles E Hughes COP 3402 FallSystems Software Charles E Hughes COP 3402 Fall
Systems Software Charles E Hughes COP 3402 FallSystems Software Charles E Hughes COP 3402 Fall
Symbol Tables COP 3402 System Software Fall 2013Symbol Tables COP 3402 System Software Fall 2013
Compilation Process COP 3402 Fall 2014 Compilation processCompilation Process COP 3402 Fall 2014 Compilation process