Powere Lab HKU A ZVS approach for ACDC

Powere. Lab HKU A ZVS approach for AC/DC converter with PFC The Power Electronics Lab. , Hong Kong University N. K. Poon C. P. Liu M. H. Pong Speaker Bryan M. H. Pong Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 1

Some basic concepts Load n n Power e. Lab HKU Input rectifiers and capacitor produce Pulsating input current Harmonic currents are generated Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 2

A conventional method Ipfc n Power e. Lab HKU Idc A boost converter and a DC/DC converter Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 3

A popular method among researchers Ipfc n Power e. Lab HKU Idc Single stage design which combines the boost and the DCDC converters Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 4

Is single stage design always better? Let us take a look Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 5

Why two-stage design? • Advantage • Losses Ipfc 2 + Idc 2 • Fix DCDC input voltage • Controllable bulk voltage Ipfc Idc • Disadvantage • Need two controllers • One more MOSFET Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 6

Why single-stage design? • Advantage • One controller • One MOSFET less Ipfc • Disadvantage Idc • Losses (Ipfc + Idc)2 • High Idc at low line • Higher Ipfc • High current stress • High voltage stress Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 7

Good reasons for two-stage o. Two-Stage o. Single Stage • Advantages • Losses Ipfc 2 + Idc 2 • One controller • Fix DCDC input voltage • One MOSFET less • Controllable bulk voltage • Disadvantages • Need two controller • Losses (Ipfc + Idc)2 • One more MOSFET • High Idc at low line • Higher Ipfc • High current stress Power e. Lab HKU • High voltage stress Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 8

Our new idea Boost + Asymmetric half-bridge with soft switching M 1 DMpfc > DM 2 Mpfc M 2 Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 9

Zero voltage state - M 2 M 1 turn off then. . Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 10

Zero voltage state - Mpfc After M 2 turn on Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 11

Two separate converters M 2 turn on Mpfc turn on Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 12

Zero voltage state – M 1 M 2 turn off Mpfc turn on Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 13

One cycle on asymmetric M 1 turn on Mpfc turn on Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 14

One cycle on PFC M 1 turn on Mpfc turn off Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 15

It’s great, but. . . If DMpfc < DM 2 DMpfc = DM 2 Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 16

After all – small M aux M 1 Mpfc added For all DMpfc and all DM 2 Maux M 2 Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 17

Final timing arrangement M 2 gate drive A M 1 gate drive B Maux gate drive Mpfc gate drive VA = V B VMaux_ds = VA-VB =0 Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 18

Practical consideration M 1 Mpfc Maux M 2 Doff guarantee a path for Laux current when M 2 off at any time Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 19

Practical circuit – O/P 12 V@10 A 250 u. H IRF 840 A Two diodes are used to clamp ringing STD 5 NM 50 12 u. H 8 u. H STPS 12 NM 50 Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 20

Simplified timing circuit L 5991 M 2 gate O/P Sync M 1 gate Maux gate Sync Mpfc gate Power e. Lab HKU O/P Prepared by Franki Poon L 4981 www. eee. hku. hk/power_electronics_lab / 21

How does it look? Width = 12. 6 cm Depth = 6. 3 cm Height = 1. 9 cm Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 22

ZVS on M 2 Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 23

ZVS on Mpfc Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 24

ZVS on Mpfc & M 2 Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 25

Losses and Efficiency Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 26

Finally. . . • Simple Boost + Asymmetric Half-bridge configuration – Good Combination. • All ZVS behaviors – Very little added cost. • Two separate converter – Easy to control • Active diode can be incorporated – <1 W no load power • Simple PWM controller – simple ASIC Power e. Lab HKU Prepared by Franki Poon www. eee. hku. hk/power_electronics_lab / 27