Parallel Implementation of IIR Filters Martijn vd Horst

Outline • IIR Filters • Implementation Methods – – Look Ahead Block-State Incremental Block-State

IIR Filters Input Output 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl

Describing Filters • Transfer Function: • Difference Equation: • State space form: 10/27/2021 Martijn

Implementation We want: • Sample rates exceeding processing rates • This means parallel inputs

Clustered Look Ahead n-2 n-1 n n n-P-1 n-P P • Increase the size

Scattered Look Ahead n-2 n-1 n n-2 P n-P P • • • 10/27/2021

Block-State The state space form can be rewritten into a state space form using

Block-State Architecture Input State 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl

Block-State 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science,

Incremental Block-State 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer

Extra buffer • Transform a Mealey into a Moore Machine Output State • Filter

Comparison Efficiency: The number of multipliers used by an implementation compared to theoretical optimum

Efficiencies Scattered Look ahead Incremental Block-state 10/27/2021 Martijn v/d Horst, M. G. v. d.

Efficiencies N=8 N=16 Scattered Look ahead Block-state N=32 N=64 Incremental Block-state with extra buffer

All-pass Filters • Also called phase shifters • Theoretical optimum is P N 10/27/2021

Conclusion • Efficient block implementations for IIR filters exist • These implementations can be

Future Work • Finding more efficient all-pass implementations • Adaptive Equalizers • Other signal

Questions? 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science,

Farewell Thang 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer

Slides: 20

Download presentation

Parallel Implementation of IIR Filters Martijn v/d Horst M. G. v. d. Horst@tue. nl 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 1

Outline • IIR Filters • Implementation Methods – – Look Ahead Block-State Incremental Block-State Extra buffer • Comparison • All-pass Filters • Conclusion and Future Work 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 2

IIR Filters Input Output 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 3

Describing Filters • Transfer Function: • Difference Equation: • State space form: 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 4

Implementation We want: • Sample rates exceeding processing rates • This means parallel inputs and outputs, also called block implementations • Implementations which scale well 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 5

Clustered Look Ahead n-2 n-1 n n n-P-1 n-P P • Increase the size of the recursive loop • The order of the filter increases • Might become unstable 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 6

Scattered Look Ahead n-2 n-1 n n-2 P n-P P • • • 10/27/2021 n P Increase the size of the recursive loop The order of the filter increases Remains stable Can be implemented with P parallel filters Non-recursive part can be decomposed Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 7

Block-State The state space form can be rewritten into a state space form using input and output vectors: 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 8

Block-State Architecture Input State 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking Output 9

Block-State 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 10

Incremental Block-State 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 11

Extra buffer • Transform a Mealey into a Moore Machine Output State • Filter order increases by one • P - 1 multipliers saved for Block-State • P - P div I multipliers saved for Incremental Block-State 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 12

Comparison Efficiency: The number of multipliers used by an implementation compared to theoretical optimum number. A single input, single output implementation of an IIR filter of order N requires 2 N + 1 multipliers. Therefore theoretical optimum for an implementation handling P simultaneous inputs and outputs is P (2 N + 1) multipliers. 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 13

Efficiencies Scattered Look ahead Incremental Block-state 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking Block-state Incremental Block-state with extra buffer 14

Efficiencies N=8 N=16 Scattered Look ahead Block-state N=32 N=64 Incremental Block-state with extra buffer 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 15

All-pass Filters • Also called phase shifters • Theoretical optimum is P N 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 16

Conclusion • Efficient block implementations for IIR filters exist • These implementations can be used for allpass filters • Theoretically there is room for improvement in implementing all-pass filters 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 17

Future Work • Finding more efficient all-pass implementations • Adaptive Equalizers • Other signal processing algorithms 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 18

Questions? 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 19

Farewell Thang 10/27/2021 Martijn v/d Horst, M. G. v. d. Horst@tue. nl TU/e Computer Science, System Architecture and Networking 20