open vswitch with DPDK architecture and performance July

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open vswitch with DPDK: architecture and performance July 11, 2016 Irene Liew

open vswitch with DPDK: architecture and performance July 11, 2016 Irene Liew

Open. Vswitch (OVS) Visit: http: //openvswitch. org/ to learn Why OVS • A software-based

Open. Vswitch (OVS) Visit: http: //openvswitch. org/ to learn Why OVS • A software-based solution • Resolve the problems of network separation and traffic visibility, so the cloud users can be assigned VMs with elastic and secure network configurations • Flexible Controller in User-Space • Fast Datapath in Kernel • An implementation of Open Flow • community project offered under the Apache 2. 0 license • OVS release 2. 5. 0 available for download • Intel Open Network Program selected OVS as Intel open virtual switch

open vswitch with DPDK architecture

open vswitch with DPDK architecture

NATIVE Open v. Switch – architecture User Space Main forwarding plane runs in kernel

NATIVE Open v. Switch – architecture User Space Main forwarding plane runs in kernel space Exception packets are sent to vswitchd in userspace using Netlink ovs-vswitchd Netlink NIC Standard Linux network interfaces to communicate with physical network Kernel Space OVS Kernel Space Forwarding Plane (openvswitch. ko) NIC

Virtual Switch Requirements – Enterprise vs Telco Enterprise Data Center Telco Network Infrastructure Manageability

Virtual Switch Requirements – Enterprise vs Telco Enterprise Data Center Telco Network Infrastructure Manageability Console Larger Packet Mix for Endpoint Use 10 G connectivity Software only switching Out-of-box platform software Mainstream hardware features Live Migration Typical Smaller Packets in Network Switching 40 G connectivity and greater Software augmented with hardware Custom platform software Network Functions Virtualization Low jitter/latency Lower Downtime (aggressive migration) OVS Kernel datapath gives adequate performance in many cloud and enterprise use cases However, the performance is not sufficient in some Telco NFV use cases

DPDK Integration OVS 2. 5. 0 Native OVS User Space Integrate latest DPDK library

DPDK Integration OVS 2. 5. 0 Native OVS User Space Integrate latest DPDK library into OVS ovs-vswitchd Netlink OVS with DPDK User Space Kernel Space OVS Kernel Space Forwarding Plane NIC OVS User Space Forwarding Plane ace PMD Driver NIC PMD Driver Kernel Space User Space DPDK NIC Main forwarding plane runs in userspace as separate threads of vswitchd • DPDK PMD to communicate with physical network • Available as a compile time option for standard OVS • Enables support for new NICs, ISAs, performance optimizations, and features available in latest version of DPDK. ovs-vswitchd NIC DPDK • NIC

Open v. Switch (OVS) With DPD Controller Open. Flow ovsdb ARCHITECTURE Data Path Control

Open v. Switch (OVS) With DPD Controller Open. Flow ovsdb ARCHITECTURE Data Path Control Path ovsdb server virtio Qemu ovs-vswitchd netdev_vport netdev_linux Control Path dpif-netdev (User Space Forwarding) openvswitch. ko netdev ofproto dpif-netlink (Kernel Space Forwarding – Control only) VNF Compute Node: User Space overlays sockets netdev_dpdk DPDK librte_vhost VNF virtio Qemu DPDK PMD librte_eth Compute Node: Kernel space

OVS with DPDK architecture: Structure ovs-vswitchd ofproto vhost Openflow controller netdev ofproto-dpif netdev-dpdk dpif

OVS with DPDK architecture: Structure ovs-vswitchd ofproto vhost Openflow controller netdev ofproto-dpif netdev-dpdk dpif libdpdk dpif-netdev User space vfio uio NIC Kernel space Hardware

Open v. Switch (OVS) With DPD COMMANDS ovs-vsctl - vswitch management ovsdb server ovs-ofctl

Open v. Switch (OVS) With DPD COMMANDS ovs-vsctl - vswitch management ovsdb server ovs-ofctl – Openflow management ovs-vswitchd ovs-appctl – ovs-vswitchd management ofproto Control Path dpif-netlink (Kernel Space Forwarding – Control only) dpif-netdev (User Space Forwarding) openvswitch. ko Data Path Control Path

Open v. Switch® with DPDK Processing Pipeline: OPENFLOW

Open v. Switch® with DPDK Processing Pipeline: OPENFLOW

OVS 2. 5. 0 Summary

OVS 2. 5. 0 Summary

Supported features • Vhost multi-queue feature: • Multi-queue support to vhost-user for the DPDK

Supported features • Vhost multi-queue feature: • Multi-queue support to vhost-user for the DPDK datapath (DPDK 2. 2. 0 and newer). • QEMU-2. 5. 0 and newer versions required for multi-queue support 12

Multiqueue v. Host OVS 2. 5. 0 VM Q 0 Q 1 R T

Multiqueue v. Host OVS 2. 5. 0 VM Q 0 Q 1 R T x x PMD 0 v. Nic • Provides way to scale out performance when using vhost ports. Q 3 R T x x Q 2 R T x x PMD 1 PMD 2 PMD 3 Guest • RSS hash used to distribute Rx traffic across queues v. Switch Core 1 Core 2 Core 3 Core 4 … Host Hardware Q 0 Q 1 R T x x Q 2 R T x x NIC Q 3 R x T x • Number of queues configured for v. Host v. NIC is matched with the same number of queues in the physical NIC • Each queue is handled by a separate PMD i. e. the load for a v. Nic is spread across multiple PMDs

OVS with DPDK Performance 14

OVS with DPDK Performance 14

OVS-DPDK Performance tuning 1. Enable hugepage size 1 GB (64 -bit OS) / 2

OVS-DPDK Performance tuning 1. Enable hugepage size 1 GB (64 -bit OS) / 2 MB (32 -bit OS) setup on the host 2. Isolate cores from the linux scheduler in the boot command line 3. Affinitize DPDK pmd threads and Qemu v. CPU threads accordingly • PMD threads affinity Use multiple poll mode driver threads. E. g. to run PMD threads on core 1 and 2: # ovs-vsctl set Open_v. Switch. other_config: pmd-cpu-mask=6 VM 1 QEMU threads: • Qemu v. CPU thread Affinity Logical Core Note: # active threads (with 100 CPU%) are set to different logical cores 4. Disable RX Mergeable buffers Process QEMU (main 3 thread for VM 1) 4 QEMU 5 QEMU -netdev type=vhost-user, id=net 2, chardev=char 2, vhostforce -device virtio-netpci, mq=on, netdev=net 2, mac=00: 00: 00: 02, csum=off, gso=off, guest_tso 4=off, guest_tso 6=off, guest_ecn=o ff, mrg_rxbuf=off 5. Enable the number of rx queues for DPDK interface (multi-queue) # ovs-vsctl set Interface <DPDK interface> options: n_rxq=<integer>

Item Platform Configuration Server Platform Description Supermicro X 10 DRH-I http: //www. supermicro. com/products/motherboard/Xeon/C

Item Platform Configuration Server Platform Description Supermicro X 10 DRH-I http: //www. supermicro. com/products/motherboard/Xeon/C 600/X 1 0 DRH-i. cfm Software Component Host Operating System Version VM Operating System Fedora 23 x 86_64 (Server version) QEMU-KVM version 2. 5. 0 Open v. Switch 2. 4. 9 Commit ID: 53902038 abe 62 c 45 ff 46 d 7 de 9 dcec 30 c 3 d 1 d 861 e Intel® Ethernet Drivers i 40 e-1. 4. 25 DPDK version: 2. 2. 0 Fedora 23 x 86_64 (Server version) Kernel version: 4. 2. 3 -300. fc 23. x 86_64 Dual Integrated 1 Gb. E ports via Intel® i 350 -AM 2 Gigabit Ethernet Chipset Intel® C 612 chipset (formerly Lynx-H Chipset) Processor 1 x Intel® Xeon® Processor E 5 -2695 v 4 Kernel version: 4. 2. 3 -300. fc 23. x 86_64 2. 10 GHz; 120 W; 45 MB cache per processor 18 cores, 36 hyper-threaded cores per processor Memory Local Storage PCIe NICs 64 GB Total; Samsung 8 GB 2 Rx 8 PC 4 -2400 MHz, 8 GB per channel, 8 Channels 500 GB HDD Seagate SATA Barracuda 7200. 12 (SN: Z 6 EM 258 D) 2 x PCI-E 3. 0 x 8 slot Intel® Ethernet Converged Network Adapters X 710 -DA 4 2 x Intel® Ethernet Converged Network Adapter X 710 -DA 4 Total: 8 Ports; 2 ports from each NIC used in tests. BIOS AMIBIOS Version: 2. 0 Release Date: 12/17/2015 http: //www. dpdk. org/browse/dpdk/snapshot/dpdk 2. 2. 0. tar. gz

Phy-OVS-VM Performance Source: Irene Liew, Anbu Murugesan – Intel IOTG/NPG • Observed performance gain

Phy-OVS-VM Performance Source: Irene Liew, Anbu Murugesan – Intel IOTG/NPG • Observed performance gain with hyper-threaded core (Hyperthreading enabled) • Core scaling is linear * Source: Intel ONP 2. 1 Performance Test Report 17

Phy-OVS-VM 1 -OVS-VM 2 -OVS-Phy Performance • Core scaling is linear * Source: Intel

Phy-OVS-VM 1 -OVS-VM 2 -OVS-Phy Performance • Core scaling is linear * Source: Intel ONP 2. 1 Performance Test Report 18

40 G Switching performance OVS-DPDK 40 Gbps Switching Performance for 256 B packets Scenario

40 G Switching performance OVS-DPDK 40 Gbps Switching Performance for 256 B packets Scenario 1 Scenario 3 45 40 Throughput (Gbps) 35 30 25 20 15 10 Scenario 1 Scenario 3 5 - 2 cores 5 cores # of cores * Source: 6 cores 8 cores Intel ONP 2. 1 Performance Test Report 19

OVS-DPDK: Multi-queue VHOST performance • Benefit of multi-queue can be observed when number of

OVS-DPDK: Multi-queue VHOST performance • Benefit of multi-queue can be observed when number of cores assigned for PMD threads align to the RX queues. • Recommend minimum of 4 cores assigned to PMD threads in multi-queue configuration 20

Reference. S • ONP 2. 1 Performance Test Report (https: //download. 01. org/packetprocessing/ONPS 2.

Reference. S • ONP 2. 1 Performance Test Report (https: //download. 01. org/packetprocessing/ONPS 2. 1/Intel_ONP_Release_2. 1_Performance_Test_Report_Rev 1. 0. pdf) • How to get best performance with NICs on Intel platforms with DPDK: http: //dpdk. org/doc/guides 2. 2/linux_gsg/nic_perf_intel_platform. html • Open v. Switch 2. 5. 0 documentation and installation guide: • http: //openvswitch. org/support/dist-docs-2. 5/ • https: //github. com/openvswitch/ovs/blob/master/INSTALL. DPDK-ADVANCED. md 21

Legal Notices and Disclaimers Intel technologies’ features and benefits depend on system configuration and

Legal Notices and Disclaimers Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Learn more at intel. com, or from the OEM or retailer. No computer system can be absolutely secure. Tests document performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult other sources of information to evaluate performance as you consider your purchase. For more complete information about performance and benchmark results, visit http: //www. intel. com/performance. Intel, the Intel logo and others are trademarks of Intel Corporation in the U. S. and/or other countries. *Other names and brands may be claimed as the property of others. © 2016 Intel Corporation.