Number Representations and Arithmetic Presenter Max Academy Lecture
Number Representations and Arithmetic Presenter Max. Academy Lecture Series – V 1. 0, September 2011
Lecture Overview • • • 2 Why we care Number representation Number types in Max. Compiler Rounding Arithmetic styles Error and other numerics issues
Why we care • Performance depends on the number of arithmetic units that fit in the FPGA lower precision = more units = higher performance • Accuracy and performance may be competing objectives – FPGA resource usage depends on data representation and bitwidths • Custom computers give us greater control over number representation, but we need to achieve enough accuracy with small enough resource usage 3
Number Representation • Microprocessors: - Integer: unsigned, two’s complement - Floating Point • others: – Fixed point – Logarithmic number representation – Redundant number systems: use more bits • Signed-digit representation • Residue number system (modulo arithmetic) – Decimal: decimal floating point, binary coded decimal 4
One’s Complement Unsigned 0000 1111 0001 0 Representations 15 1 1110 0 0010 -0 +1 14 2 -1 +2 1101 0011 13 3 +3 -2 Signed Values (1’s Complement) +4 4 0100 12 -3 +5 5 -4 0101 11 +6 -5 1011 6 +7 -6 0110 -7 1010 9 8 0111 1000 -+ 5
Two’s Complement Unsigned 0000 1111 0001 0 Representations 15 1 1110 0 0010 -1 +1 14 2 -2 +2 1101 0011 13 3 +3 -3 Signed Values (2’s Complement) +4 4 0100 12 -4 +5 5 -5 0101 11 +6 -6 1011 6 +7 -7 0110 -8 10 7 1010 9 8 0111 1000 -+ 6
Signed N-bit Integers • Sign-magnitude representation for integer x. Most significant bit (msb) is the sign bit. Advantages: symmetry around 0, easy access to |x|, simple overflow detection Disadvantages: complexity of add/sub. • One’s complement numbers: Represent -x by inverting each bit. Overflow=Sign_Carry_In ^ Sign_Carry_Cout Advantages: fast negation Disadvantages: add/sub correction: carry-out of sign bit is added to lsb • Two’s complement: Represent -x by inverting each bit and adding ‘ 1’. Overflow=same as One’s c. Advantages: fast add/sub Disadvantages: magnitude computation requires full addition 7
Fixed Point Numbers • Generalisation of integers, with a ‘radix point’ • Digits to the right of the radix point represent negative powers of 2 Digit weights: (unsigned) 24 23 22 21 20 2 -1 I bits • F = number of fractional bits – Bits to the right of the ‘radix point’ – For integers, F = 0 8 2 -2 2 -3 F bits 2 -4 2 -5
Fixed Point Maths • Think of each number as: (V 2 -F) • Addition and subtraction: (V 1 2 -F 1) + (V 2 2 -F 2) – Align radix points and compute the same as for integers 1 + = 1 0 0 1 0 1 0 1 0 0 1 1 0 • Multiplication: (V 1 2 -F 1) (V 2 2 -F 2) = V 1 V 2 2 -(F 1+F 2) = 0 1 1 0 1 0 0 1 1 0 • Division: (V 1 2 -F 1) / (V 2 2 -F 2) = (V 1/V 2) 2 -(F 1 -F 2) 9 0
Floating Point Representation • regular mantissa = 1. xxxxxx • denormal numbers: mantissa = 0. xxxxxx with min exponent • IEEE FP Standard: base=2, single, double, extended widths • Custom Computing: choose widths of fields + choose base • Tradeoff: – Performance: small widths, larger base, truncation. – versus Accuracy: wide, base=2, round to even. • Disadvantage: FP arithmetic units tend to be very large compared to Integer/fixed point units. 10
Floating Point Maths • Addition and subtraction: – Align exponents: shift smaller mantissa to the larger number’s exponent – Add mantissas – Normalize: shift mantissa until starts with ‘ 1’, adjust exponent • Multiplication: – Multiply mantissas, add exponents • Division: – Divide mantissas, subtract exponents 11
Number Representation in Max. Compiler • Max. Compiler has in-built support for floating point and fixed point/integer arithmetic – Depends on the type of the HWVar • Can type inputs, outputs and constants • Or can cast HWVars from one type to another • Types are Java objects, just like HWVars, // Create an input of type t HWVar io. input(String name, HWType t); // Create an HWVar of type t with constant value HWVar constant. var(HWType t, double value); // Cast HWVar y to type t HWVar x = y. cast(HWType t); 12
hw. Float • Floating point numbers with base 2, flexible exponent and mantissa • Compatible with IEEE floating point except does not support denormal numbers – In custom computers choose to use a larger exponent HWType t = hw. Float(int exponent_bits, int mantissa_bits); • Examples: Including the sign bit Exponent bits Mantissa bits IEEE single precision 8 24 IEEE double precision 11 53 7 17 FPGA optimized low precision Why hw. Float(7, 17)…? 13
hw. Fix • Fixed point numbers • Flexible integer and fraction bits • Flexible sign mode – Sign. Mode. UNSIGNED or Sign. Mode. TWOSCOMPLEMENT HWType t = hw. Fix(int integer_bits, int fraction_bits, Sign. Mode sm); • Common cases have useful aliases 14 Integer bits Fraction bits Sign mode hw. Int(N) N 0 TWOSCOMPLEMENT hw. UInt(N) N 0 UNSIGNED hw. Bool() 1 0 UNSIGNED
Mixed Types • Can mix different types in a Max. Compiler kernel to use the most appropriate type for each operation – Type conversions costs area – must cast manually • Types can be parameter to a kernel program – Can generate the same kernel with different types class My. Kernel extends Kernel { public My. Kernel(Kernel. Parameters k, HWType t_in, HWType t_out) { super(k); HWVar p = io. input(“p”, hw. Float(8, 24)); HWVar q = io. input(“q”, t_in); HWVar r = p * p; HWVar s = r + q. cast(r. get. Type()); io. output(“s”, s. cast(t_out), t_out); } 15 }
Rounding • When we remove bits from the RHS of a number we may want to perform rounding. – Casting / type conversion – Inside arithmetic operations • Different possibilities – TRUNCATE: throw away unwanted bits – TONEAR: if >=0. 5, round up (add 1) – TONEAREVEN: if >0. 5 round up, if <0. 5 round down, if =0. 5 then round to the nearest even number • Lots of less common alternatives: – Towards zero, towards positive infinity, towards negative infinity, random…. • Very important in iterative calculations – may affect convergence behaviour 16
Rounding in Max. Compiler • Floating point arithmetic uses TONEAREVEN • Fixed point rounding is flexible, controlled by the Rounding. Mode – TRUNCATE, TONEAR and TONEAREVEN are in-built HWVar z; . . . optimization. push. Rounding. Mode(Rounding. Mode. TRUNCATE); z = z. cast(smaller_type); optimization. pop. Rounding. Mode(); 17
Arithmetic Styles Digit-Serial Sequential - loop x times Pipelined - loop unrolled Combinational - loop unrolled - no registers - logic minimization 18 Parallel
Arithmetic in Max. Compiler • By default uses deeply pipelined arithmetic functions – Objective is high operating frequency • Can reduce pipelining gradually to produce combinatorial functions, controlled by pushing and popping a “pipelining factor” – 1. 0 = maximum pipelining ; 0. 0 = no pipelining HWVar x, y, z; // floating point numbers. . . z = x * y; // fully pipelined optimization. push. Pipelining. Factor(0. 5); z += x; // half pipelined – lower latency optimization. push. Pipelining. Factor(0. 0); z += y; // no pipelining optimization. pop. Pipelining. Factor(); z = z * 2; // fully pipelined again 19
Cost for arithmetic • Addition/subtraction: – ~1 LUT/bit for fixed point, hundreds of LUTs for floating point • Multiplication: Can use DSP blocks – 18 x 25 bit multiply on Xilinx – Number of DSPs depends on total bits (fixed point) or mantissa bitwidth (floating point) Approximate cost models Floating point: hw. Float(E, M) Fixed point: hw. Fix(I, F, TWOSCMP) DSPs Add/subtract Multiply Divide LUTs DSPs 0 O( M log 2(E) ) 0 I+F O( ceil(M/18)2 ) O(E) O( ceil((I+F)/18)2 ) 0 0 O( M 2 ) 0 O( (I+F)2 ) I = Integer bits, F = Fraction bits. E = Exponent bits, M = Mantissa Bits 20 LUTs
DSP usage for N x M multiplication M N 21 Bits 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 18 1 1 2 2 2 2 2 3 3 3 20 1 2 2 2 2 3 3 3 3 3 4 22 1 2 2 2 2 3 3 3 3 3 4 24 1 2 2 2 2 3 3 3 3 3 4 26 2 2 4 4 4 4 4 6 6 6 28 2 2 4 4 4 4 4 6 6 6 30 2 2 4 4 4 4 4 6 6 6 32 2 2 4 4 4 4 4 6 6 6 34 2 2 4 4 4 4 4 6 6 6 36 2 3 3 3 4 4 4 5 5 6 6 6 7 38 2 3 3 3 4 4 4 5 5 6 6 6 7 40 2 3 3 3 4 4 4 5 5 6 6 6 7 42 2 3 3 3 4 4 4 5 5 6 6 6 7 44 3 3 6 6 6 6 6 9 9 9 46 3 3 6 6 6 6 6 9 9 9 48 3 3 6 6 6 6 6 9 9 9 50 3 3 6 6 6 6 6 9 9 9 52 3 3 6 6 6 6 6 9 9 9 54 3 3 6 6 6 7 7 9 9 9 10
LUT usage for floating point addition 600 8 Exponent bits 7 Exponent bits 500 6 Exponent bits 5 Exponent bits LUT/FF pairs 400 300 200 100 0 4 22 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Mantissa bits
Benefits of Fixed Point • Consider fixed point compared to single precision floating point • If range is tightly confined, we could use 24 -bit fixed point • If data has a wider range, may need 32 -bit fixed point hw. Float(8, 24) hw. Fix(24, . . . ) Add Multiply hw. Fix(32, . . . ) 500 LUTs 24 LUTs 32 LUTs 2 DSPs 4 DSPs • Arithmetic is not 100% of the chip. In practice, often see ~5 x performance boost from fixed point. 23
Error • A, B: . A (op) B = result + error • Floating point introduces (dynamic) relative error – Error = f(exponent of result) relative error • Fixed point introduces (static) absolute error – Error = f(rightmost bit position of result) static error • 24 Error is minimized by good rounding
Other numerics issues • Overflow – Number is too large (positive or negative) to be represented – Usually catastrophic – important data is lost/invalid • Underflow – – • Number is too small to be represented and rounds to zero With fixed point, happens gradually With floating point without denormals, happens suddenly Usually underflowing data is not so important (numbers are very small) Bias – If errors do not have a mean of zero, they will grow with repeated computation. – Big issue in iterative calculations numbers gradually get more and more wrong! – TONEAREVEN rounding mode minimizes bias 25
Further Reading on Computer Arithmetic • Recommended reading: – Goldberg, “What Every Computer Scientist Should Know About Floating. Point Arithmetic”, ACM Computing Surveys, March 1991 • Textbooks: – Koren, “Computer Arithmetic Algorithms, ” 1998. – Pahrami, ”Computer Arithmetic: Algorithms and Hardware Designs, ” Oxford University Press, 2000. – Waser, Flynn, “Introduction for Arithmetic for Digital Systems Designers, ” Holt, Rinehard & Winston, 1982. – Omondi, “Computer Arithmetic Systems, ” Prentice Hall, 1994. – Hwang, “Computer Arithmetic: Principles, Architectures and Design, ” Wiley, 1978. 26
Exercises 1. Write a Max. Compiler kernel that takes one hw. Float(8, 24) input stream and adds it to a hw. Float(11, 53)input stream to produce a hw. Float(11, 53) result. 2. What will be the result of trying to represent X=232 and Y=2 -2 in each of the following number types: hw. Fix(32, 0, UNSIGNED) hw. Fix(32, 0, TWOSCOMPLEMENT) hw. Fix(28, 4, UNSIGNED) hw. Fix(32, 4, UNSIGNED) hw. Float(11, 53) hw. Float(8, 24) hw. Float(8, 32) hw. Float(8, 33) 3. 27 Construct a test to show the difference between rounding modes on a multiplication operation of two hw. Fix(4, 4, TWOSCOMPLEMENT) numbers. Vary the number of fraction bits – what is the impact on the bias difference between TONEAR and TONEAREVEN and why?
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