NAM S B MDLAB Electronic Engineering Kangwon National
NAM S. B MDLAB. Electronic Engineering, Kangwon National University ATmega 128 CH 1 Atmega 128 Board Code. Vision 1
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NAM S. B MDLAB. Electronic Engineering, Kangwon National University Features • High-performance, Low-power AVR® 8 -bit Microcontroller • Advanced RISC Architecture – 133 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers + Peripheral Control Registers – Fully Static Operation – Up to 16 MIPS Throughput at 16 MHz – On-chip 2 -cycle Multiplier • Nonvolatile Program and Data Memories – 128 K Bytes of In-System Reprogrammable Flash Endurance: 10, 000 Write/Erase Cycles – Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation – 4 K Bytes EEPROM Endurance: 100, 000 Write/Erase Cycles – 4 K Bytes Internal SRAM – Up to 64 K Bytes Optional External Memory Space – Programming Lock for Software Security – SPI Interface for In-System Programming • JTAG (IEEE std. 1149. 1 Compliant) Interface – Boundary-scan Capabilities According to the JTAG Standard – Extensive On-chip Debug Support – Programming of Flash, EEPROM, Fuses and Lock Bits through the JTAG Interface 14
NAM S. B MDLAB. Electronic Engineering, Kangwon National University • Peripheral Features – Two 8 -bit Timer/Counters with Separate Prescalers and Compare Modes – Two Expanded 16 -bit Timer/Counters with Separate Prescaler, Compare Mode and Capture Mode – Real Time Counter with Separate Oscillator – Two 8 -bit PWM Channels – 6 PWM Channels with Programmable Resolution from 2 to 16 Bits – Output Compare Modulator – 8 -channel, 10 -bit ADC 8 Single-ended Channels 7 Differential Channels 2 Differential Channels with Programmable Gain at 1 x, 10 x, or 200 x – Byte-oriented Two-wire Serial Interface – Dual Programmable Serial USARTs – Master/Slave SPI Serial Interface – Programmable Watchdog Timer with On-chip Oscillator – On-chip Analog Comparator • Special Microcontroller Features – Power-on Reset and Programmable Brown-out Detection – Internal Calibrated RC Oscillator – External and Internal Interrupt Sources – Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and Extended Standby – Software Selectable Clock Frequency – ATmega 103 Compatibility Mode Selected by a Fuse – Global Pull-up Disable 15
NAM S. B MDLAB. Electronic Engineering, Kangwon National University • I/O and Packages – 53 Programmable I/O Lines – 64 -lead TQFP and 64 -pad MLF • Operating Voltages – 2. 7 - 5. 5 V for ATmega 128 L – 4. 5 - 5. 5 V for ATmega 128 • Speed Grades – 0 - 8 MHz for ATmega 128 L – 0 - 16 MHz for ATmega 128 16
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NAM S. B MDLAB. Electronic Engineering, Kangwon National University AVR CPU Core 18
NAM S. B MDLAB. Electronic Engineering, Kangwon National University Status Register l Bit 7 (I) : Global Interrupt Enable l Bit 6 (T) : 비트 복사 저장 (Bit Copy Storage) l Bit 5 (H) : 보조 캐리 플래그 (Half Carry Flag) l Bit 4 (S) : Sign Bit l Bit 3 (V) : 2의 보수 오버플로우 비트 (two's complement overflow bit) l Bit 2 (N) : Negative Flag l Bit 1 (Z) : Zero Flag l Bit 0 (C) : Carry Flag 19
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NAM S. B MDLAB. Electronic Engineering, Kangwon National University Address Latch Requirements 26
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NAM S. B MDLAB. Electronic Engineering, Kangwon National University 29 ØSRL 2∼SRL 0 (Wait State Sector Limit) 비트 • 메모리를 2개의 섹터로 구분하는 기능을 담당 ØSRW 11와 SRW 10 비트 (Wait-state Select Bits for Upper Sector) • MCUCR의 SRW 10 비트와 XMCUCR의 SRW 11 비트를 조합하여 외부 데이터 메모리의 상위 섹터에 해당하는 영 역의 웨이트 사이클을 설정 ØSRW 01과 SRW 00 비트 (Wait-state Select Bits for Lower Sector) • 외부 데이터 메모리의 하위 섹터에 해당하는 영역의 웨이트 사이클을 설정
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NAM S. B MDLAB. Electronic Engineering, Kangwon National University 제 2 바이트 : 퓨즈 상위 바이트 비트 이름 OCDEN JTAGEN 비트 7 6 SPIEN 5 CKOPT 4 EESAVE 3 BOOTSZ 1 2 BOOTSZ 0 1 BOOTRST 0 기능 OCD 기능 선택 JTAG 기능 선택 SPI를 통한 직렬 프로그래밍 기능 선택 오실레이터 옵션(시스템 클록 참조) 칩 삭제 시에 EEPRPOM의 내용을 보존 부트 섹션 크기 선택 (표 2. 21 참조) 리셋 벡터 선택 기본 값 1(unprogrammed, OCD disabled) 0(programmed, JTAG enabled) 0(programmed, SPI Prog. enabled) 1(unprogrammed, EEPROM not preserved) 0(programmed) 1(unprogrammed) 제 3 바이트 : 퓨즈 하위 바이트 비트 이름 비트 기능 기본 값 BODLEVE L 7 BOD(Brown Out Detector) 트리거 레벨을 선택 BODEN 6 BOD 기능 사용 허용 1(unprogrammed) SUT 1 5 기동 시간 설정 1(unprogrammed) SUT 0 4 기동 시간 설정 0(programmed ) CKSEL 3 3 클럭 소스 설정 0(programmed ) CKSEL 2 2 클럭 소스 설정 0(programmed ) CKSEL 1 1 클럭 소스 설정 0(unprogrammed) CKSEL 0 0 클럭 소스 설정 1(programmed ) 38
39 NAM S. B MDLAB. Electronic Engineering, Kangwon National University 제품 표시 바이트 • ATmel사에서 출시되는 모든 마이크로컨트롤러에는 소자의 종류에 따라 3 바이트의 인식 코드를 내장하고 있음. 0 x 00 번지 0 x 01 번지 0 x 02 번지 AVR 모델 0 x 98 (256 KB 플래시) 0 x 01 ATmega 2560 0 x 02 ATmega 2561 0 x 01 ATmega 103 0 x 02 ATmega 128 0 x 03 ATmega 1280 0 x 02 ATmega 64 0 x 08 ATmega 640 0 x 01 ATmega 161 0 x 02 ATmega 163 0 x 03 ATmega 16 0 x 04 ATmega 162 0 x 05 ATmega 169 0 x 93 (8 KB 플래시) 0 x 06 ATmega 8515 0 x 08 ATmega 8535 0 x 91 (2 KB 플래시) 0 x 07 ATtiny 28 0 x 0 A ATtiny 2813 0 x 97 (128 KB 플래시) 0 x 96 (64 KB 플래시) 0 x 1 E (Atmel사의 제품) 0 x 94 (16 KB 플래시)
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44 NAM S. B MDLAB. Electronic Engineering, Kangwon National University menu bar Tool bar Navigate window Edit window
NAM S. B MDLAB. Electronic Engineering, Kangwon National University 1. Code. Vision Execution (1) Code. Vision을 실행한다. 45
NAM S. B MDLAB. Electronic Engineering, Kangwon National University 1. New project (2) File →New (새로운 프로젝트 생성) (3) Select the Project (4) yes 46
NAM S. B MDLAB. Electronic Engineering, Kangwon National University 2. Project configuration (6) Module 생성 및 포트 선택(예: LCD: port. B) (7) Module 생성 및 포트 선택(예: LCD: port. B) (5) Selected Chip 47
NAM S. B MDLAB. Electronic Engineering, Kangwon National University 2. Project configuration (8) USART 0 Module 을 생성하였을 경우 (9) 송수신 선택 (10) 통신속도 선택 (11) 통신 규약 선택 48
NAM S. B MDLAB. Electronic Engineering, Kangwon National University 2. Project configuration (12) Port I/O select 49
NAM S. B MDLAB. Electronic Engineering, Kangwon National University 3. File generation (13) *. c source file Save (13) File → Generate Save and Exit (14) *. prj project file Save 50
NAM S. B MDLAB. Electronic Engineering, Kangwon National University 3. File generation (15) *. cwp file Save 51
NAM S. B MDLAB. Electronic Engineering, Kangwon National University 4. Source File (16) Source file 자동 생성 52
NAM S. B MDLAB. Electronic Engineering, Kangwon National University 5. Project Compile (17) Project → Compile 컴파일 한다 (18) 컴파일 결과 오류가 없으면 “Ok” 53
NAM S. B MDLAB. Electronic Engineering, Kangwon National University 7. Make File (17) Project → Make 실행파일 생성 (18) “Make” 결과 오류가 없으면 “Ok” 54
NAM S. B MDLAB. Electronic Engineering, Kangwon National University 8. Navigation (19) Navigation으로 파일 확인 55
NAM S. B MDLAB. Electronic Engineering, Kangwon National University Pony. Prog _Excution (20) Pony. Prog 를 실행한다. 56
NAM S. B MDLAB. Electronic Engineering, Kangwon National University Pony. Prog _Chip select (21) Chip을 선택한다 57
NAM S. B MDLAB. Electronic Engineering, Kangwon National University Pony. Prog _Chip select (21) Device → Chip 선택으로 하여도 된다 58
NAM S. B MDLAB. Electronic Engineering, Kangwon National University Pony. Prog _Interface Setup(for PC connection) (22) Setup → Interface Setup Pony. Prog _Excution (23) Parallel Port 선택 Avr. ISP I/O 선택 LPT 1 선택 (24) Probe로 Parallel Port Scan (25) Parallel Port 가 정상적으로 연결되어 있으면 “Test Ok”매시지 출력 59
NAM S. B MDLAB. Electronic Engineering, Kangwon National University Pony. Prog _Device File Read(Hexa File read) (26) File → Open Device File로 *. Hex file을 읽어들인다 60
NAM S. B MDLAB. Electronic Engineering, Kangwon National University (27) File → Open Device File로 *. Hex file을 읽어들인 다 61
NAM S. B MDLAB. Electronic Engineering, Kangwon National University Pony. Prog _Device File Write (28) Command → Write All로 다운로드 한다. 62
NAM S. B MDLAB. Electronic Engineering, Kangwon National University Configuration of fuse bit 63
NAM S. B MDLAB. Electronic Engineering, Kangwon National University Configuration of fuse bit 64
NAM S. B MDLAB. Electronic Engineering, Kangwon National University Configuration of fuse bit (기존의 bit) 65
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