Microcontroller Fundamentals Programming Introduction to Microcontroller 1 Microprocessors

Microcontroller Fundamentals & Programming Introduction to Microcontroller 1

Microprocessors What is a microprocessor? • Only a Central Processing Unit (CPU) • Has Address, Data and Control Buses Note: By itself, it is totally useless. 2

Microcontrollers What is a microcontroller? • A processor • Parallel and serial digital I/O • Analog I/O • Counters and timers • Internal ROM and/or EPROM 3

Microcontrollers What are microcontrollers used in? • Watches • Microwaves • Stereo Receivers Some products that you might know: • • NASA’s Sojourner Rover – 8 -bit Intel 80 C 85 Palm Vx handheld – 32 -bit Motorola Dragonball EZ Sonicare toothbrush – 8 -bit Zilog Z 8 The Vendo V-MAX 720 Soda Machine – Motorola HC 11 4

Microcontrollers are a large market 5

Microcontrollers So what languages are they being programmed in? 1998 -1999 -2000 Assembly ~ 21% ~ 10% C ~ 69% ~ 80% C++ ~ 5% ~ 6% Java ~1% ~ 2% Other ~3% ~ 2% Source: TRON Association Survey 1998/99 & 1999/2000 6

68 HC 11 Motorola 68 HC 11 E 9 (features) • ROM (12 KB), EEPROM (512 B), RAM (512 B) • Counter/Timer system • A/D converter • Parallel I/Os • Expansion bus • Serial communication 7

68 HC 11 E 9 Architecture 12 KBYTES ROM 512 BYTES RAM 8

68 HC 11 CPU Memory Map of MC 68 HC 11 E 9 9

68 HC 11 CPU 68 HC 11 Programmer’s Model 10

68 HC 11 CPU 68 HC 11 Programmer’s Model 11

68 HC 11 CPU Accumulator A and B D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 0 1 1 1 ACCA or ACCB • ACCA or ACCB is a 8 -bit general-purpose registers. • Stores temporary data from memory or I/O devices. • Stores result of all arithmetic and logic operations. 12

68 HC 11 CPU Accumulator A & B Example: 1. LDAA $8000 ; loads contents of memory ; location $8000 into ACCA 2. ADDA #$25 3. STAA $9000 ; ACCA = ACCA + $25 ; store result of ACCA into ; memory location $9000 13

68 HC 11 CPU 68 HC 11 Programmer’s Model 14

68 HC 11 CPU Accumulator D 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 1 1 0 1 1 0 ACCA ACCD ACCB • ACCD represents Accumulator-D • ACCD = (ACCA + ACCB) to form a 16 -bit register. • ACCA represents most significant byte (MSByte) • ACCB represents least significant byte (LSByte) 15

68 HC 11 CPU 68 HC 11 Programmer’s Model 16

68 HC 11 CPU Index Register X and Y 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 1 1 0 1 1 0 IX or IY registers • Index register X and Y are two 16 -bit registers. • Use in Index Addressing Mode. Examples: LDX #$1000 LDAA $10, X ; loads $1000 into IX ; memory ($10+IX) content ; load to ACCA. 17

68 HC 11 CPU 68 HC 11 Programmer’s Model 18

68 HC 11 CPU Stack Pointer (SP) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 1 1 0 SP Register • Stack occupied a small section in RAM memory. • Stack Pointer (SP) register: • • a 16 -bit register. contains address of the stack. Application of stack : • used in subroutine and interrupts operations • storing all the CPU registers contents. 19

68 HC 11 CPU 68 HC 11 Programmer’s Model 20

68 HC 11 CPU Program Counter (PC) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 1 1 0 Program Counter • Program Counter (PC) is a 16 -bit register. • PC contains address of next instruction to be executed. Example: If PC = $0100, then; CPU starts executing from memory location $0100 onwards. 21

68 HC 11 CPU 68 HC 11 Programmer’s Model 22

68 HC 11 CPU Condition Code Register (CCR) D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 S X H I N Z V C Condition Code Register (CCR) • CCR is an 8 -bit register. • Bits 7 to 0 labeled as S X H I N Z V C respectively. • H, N, Z, V, C bits indicate status of last arithmetic or logic operation. • S, X, I bits indicate the masking bits. 23

68 HC 11 CPU CCR Explained 7 6 5 4 3 2 1 0 S X H I N Z V C Stop Disable X-Interrupt Mask Half Carry I-Interrupt Mask Carry Overflow Zero Negative 24

68 HC 11 CPU CCR Explained 7 6 5 4 3 2 1 0 S X H I N Z V C Stop Disable X-Interrupt Mask Half Carry I-Interrupt Mask Carry Overflow Zero Negative 25

68 HC 11 CPU N (Negative) bit • When the result of last arithmetic or logical operation is negative; then N = “ 1” (MSB = “ 1”) • Whenever the result is positive; then N = “ 0” (MSB = “ 0”) Example (1) LDAA #$7 F ; N = “ 0” , msb = “ 0” (2) LDAB #$80 ; N = “ 1” , msb = “ 1” 26

68 HC 11 CPU CCR Explained 7 6 5 4 3 2 1 0 S X H I N Z V C Stop Disable X-Interrupt Mask Half Carry I-Interrupt Mask Carry Overflow Zero Negative 27

68 HC 11 CPU Z (Zero) bit • Z = “ 1” - result of last operation produces zero. - accumulator content = $00 • Z = “ 0” - result of last operation greater than zero. - accumulator content = $00 Example (1) LDAA #$00 ; Z = “ 1”, ACCA = 0 (2) LDAB #$01 ; Z = “ 0”, ACCB > 0 28

68 HC 11 CPU CCR Explained 7 6 5 4 3 2 1 0 S X H I N Z V C Stop Disable X-Interrupt Mask Half Carry I-Interrupt Mask Carry Overflow Zero Negative 29

68 HC 11 CPU C (Carry) bit • C =“ 1” - addition or subtraction produces a carry or a borrow. • C =“ 0” - after addition or subtraction no carry or no borrow. *Note: C-bit also used in shift and rotate instructions. Example: LDAA #$80 ADDA #$90 WAI ; C=“ 1” ; bit-7 carries “ 1” to C-bit 30

68 HC 11 CPU CCR Explained 7 6 5 4 3 2 1 0 S X H I N Z V C Stop Disable X-Interrupt Mask Half Carry I-Interrupt Mask Carry Overflow Zero Negative 31

68 HC 11 CPU V (Overflow) bit • V =“ 1” - result is wrong, after an addition or subtraction on 2’s complement signed number caused an overflow • V =“ 0” - result is correct, after an addition or subtraction on 2’s complement signed number, no overflow 32

68 HC 11 CPU CCR Explained 7 6 5 4 3 2 1 0 S X H I N Z V C Stop Disable X-Interrupt Mask Half Carry I-Interrupt Mask Carry Overflow Zero Negative 33

68 HC 11 CPU H (Half-carry) bit • H =“ 1” - an 8 -bit addition, produces a carry from bit-3 to bit-4. • H =“ 0” - an 8 -bit addition, produces no carry from bit-3 to bit-4. Example: LDAA #% 0011 1000 ADDA #% 0011 1010 WAI 1+1 produces a carry ; H=“ 1” ; (after adding) 34

68 HC 11 CPU CCR Explained 7 6 5 4 3 2 1 0 S X H I N Z V C Stop Disable X-Interrupt Mask Half Carry I-Interrupt Mask Carry Overflow Zero Negative 35

HC 11 CPU Command Register I Interrupt Mask X XIRQ mask S Disable STOP instructions Note: Bits set by the user to tell the processor how to do things 36

HC 11 CPU Thank You 37