Long Channel MOS Transistors The theory developed for

Long Channel MOS Transistors The theory developed for MOS capacitor (HO #2) can be directly extended to Metal-Oxide-Semiconductor Field-Effect transistors (MOSFET) by considering the following structure: The gate bias, VG provides the control of surface carrier densities. G S n+ D n+ P – For VG < Vth (threshold voltage), the structure consists of two back to back diodes and only leakage currents flow (» Io of PN junctions), i. e. , ID » 0 – For VG > Vth, inversion layer exists, a conducting channel exists from D ® S and current ID will flow. Where Vth is determined by the properties of the structure. S. Saha 11/27/202 0 Page 1

Long Channel MOS Transistors Vth is given by Eq we derived for MOS capacitors. That is, (1) S. Saha 11/27/202 0 Page 2

1. NMOSFETs: Band Diagram S. Saha 11/27/202 0 Page 3

NMOSFETs: Band Diagram S. Saha 11/27/202 0 Page 4

2. NMOSFETs: I - V Characteristics S. Saha 11/27/202 0 Page 5

NMOSFETs: I - V Characteristics S. Saha 11/27/202 0 Page 6

I - V Characteristics: Basic Equations +VG n+ QI(y) n+ QB(y) P +VD ID Inversion layer Depletion region Note: • The depletion region is wider around the drain because of the applied drain voltage VD. • The potential along the channel varies from VD @ y = L to 0 @ y = 0 between the drain and source. • The channel charge QI and the bulk charge QB will in general be f(y) because of the influence of VD, i. e. potential varies along the channel length. S. Saha 11/27/202 0 Page 7

I - V Characteristics: Basic Equations where W = width of the device V(y) = voltage drop along the channel due to VD Solving the above three Eq we get ID - VD characteristics. S. Saha 11/27/202 0 Page 8

ID VD = VDSAT Linear Region Saturation Region VG 6 VG 5 VG 4 VG 3 VG 2 VG 1 ÖID ((amps)1/2) ® I - V Characteristics: Basic Equations VD S. Saha 11/27/202 0 Page 9

3. MOS Device Scaling Benefits of scaling MOSFETs: 1. increase device packing density n+ tox 2. improve frequency response (transit time) µ 1/L L xj n+ P lo 3. improve current drive (transconductance, gm) S. Saha 11/27/202 0 Page 10

MOS Device Scaling • Note that gm and therefore, the current drive of MOSFETs can be increased by: – decreasing the channel length, L – decreasing the gate oxide thickness, tox • Therefore, much of the scaling is driven by decrease in L and tox. S. Saha 11/27/202 0 Page 11

MOS Device Scaling Though, MOSFET scaling is driven by scaling down L and tox, many problems such as increased electric fields are encountered if scaled only these two parameters. In 1974, Dennard et al. proposed a scaling methodology which maintains the electric field in the device constants. (R. H. Dennard, et al. , IEEE JSSC, vol. 9, p. 256 -268, 1974). Device/circuit parameters Dimension: tox, L, W, xj, lo Substrate doping: Na Supply voltage: V Supply current: I Parasitic capacitance: WL / tox Gate delay: CV / I Power dissipation: CV 2 / delay S. Saha Constant field scaling factor 1/K K 1/K 1/K 1/K 2 11/27/202 0 Page 12

MOS Device Scaling In practice, constant field scaling has not been strictly observed. Since ID µ gate overdrive, (VG – Vth), thus, the demands for high performance have dictated the use of higher supply voltage. However, high supply voltage implies increased power dissipation (CV 2 f). In the recent past, low power applications have become important and have required a scaling scenario with lower supply voltage. Parameters 1970 1980 1990 2006 Channel length (mm) 10 4 1 0. 18 0. 10 Gate oxide (nm) 120 50 15 4 1. 5 Junction depth (mm) >1 0. 8 0. 3 0. 08 0. 02 -0. 03 Supply voltage 12 5 3. 3 -5 1. 5 -1. 8 0. 6 -0. 9 S. Saha 11/27/202 0 Page 13

MOS Device Scaling Ref: B. Davari, et al. , Proc. IEEE, April 1995 Device/circuit parameters Dimension: Substrate doping: Supply voltage: S. Saha Quasi Constant voltage scaling (K > B > 1) tox, L, W, xj, lo Na V 1/K K 1/B 11/27/202 0 Page 14

4. Limitations of Scaled MOSFETs A number of factors have been neglected in the simple MOS theory which became increasingly important in scaled devices. - fbi, f. F, and fms of S/D junctions were neglected – Vth dependence on W, L, and VD is not predicted by simple theory – I ¹ 0 for VG < Vth. Rather I is exponentially dependent on VG. – Current flow D ® S can be initiated by VD rather than VG. This can be modeled by a Vth which depends on VD and VG. – Since e fields cannot be held constant because of fbi etc. (and because VD has not been scaled in the industry), higher e Þ higher carrier velocity. Material limits like vsat become important. S. Saha 11/27/202 0 Page 15

4(a). Effect of Scaling Down L: Vth degradation In long channel MOSFETs, the gate is completely responsible for depleting the semiconductor (QB). In very short devices, part of the depletion is accomplished by the drain and source biases. Since less VG is required to deplete QB, Vth¯ as L¯. Similarly, as VD , more QB is depleted by VD and hence Vth¯. This effect dominates in lightly doped substrates. S. Saha 11/27/202 0 Page 16

Effect of Scaling Down L: Punchthrough If the channel length, L becomes too short, the depletion region from the drain can reach source side reducing einjection barrier. This phenomenon is known as punchthrough. S. Saha 11/27/202 0 Page 17

Effect of Scaling Down L: DIBL In very short channel devices: – less VG is required to deplete QB the barrier to electron injection from source to drain decreases. – ID at a given VG. This effect is known as the drain induced barrier lowering (DIBL). S. Saha 11/27/202 0 Page 18

Effect of Scaling L: Effect of DIBL on ID • DIBL results in an increase in ID at a given VG. Vth¯ as L¯. Similarly, as VD , more QB is depleted by VD and hence Vth¯. S. Saha 11/27/202 0 Page 19

4(b). Carrier Mobility: Velocity Saturation The mobility of the carriers reduces at higher e-fields in small channel length devices due to velocity saturation (vsat). As L¯, while VD » constant: - lateral e-field - carrier velocity ® vsat @ Ec » 104 V/cm for e-. for n. MOSFETs with L < 1 mm, vsat causes current to saturate for VD < (VG - Vth). S. Saha 11/27/202 0 Page 20

Effect of Vsat on MOSFET I - V Characteristics MOSFETs with: L = 2. 7 um tox = 500 A (a) (b) (c) (a) Experimental data; (b) simulated data including velocity saturation; (c) simulated data ignoring velocity saturation. S. Saha 11/27/202 0 Page 21

4(c). Sub-threshold Conduction • For VG < Vth, the surface is in weak inversion and a conducting channel starts to form. As a result, a low level of current flows between the source and drain. In MOS subthreshold slope, S is limited to k. T/q (60 mv/dec I) ID leakage ; Static power ; and circuit instability . S. Saha 11/27/202 0 Page 22

4(d). Hot Carrier Effects Gate n+ Source Ig l l l hot e- l m hole VD > VDSAT n+ Drain The maximum e-field at the drain-substrate junction is: Isub As L¯, in the channel near the drain Emax more rapidly than long L devices. The free carriers passing through the high e-field gain sufficient energy to cause hot-carrier effects. S. Saha 11/27/202 0 Page 23

Hot Carrier Effects S. Saha 11/27/202 0 Page 24

Hot Carrier Effects • Isub flowing into the substrate causes an IR drop in the substrate resulting in Body bias – Substrate Current induced Body Effect (SCBE). – SCBE results in Vth drop and manifold increase in S. Saha ¨ Isub ¨ IDS. 11/27/202 0 Page 25

4(e). Band-to-Band Tunneling • For small VG ~ 0 and high VD a significant drain leakage can be observed, especially for short channel devices. • For VG = 0, and VD high, the e-field can be very high in the drain region causing band-to-band tunneling (BTBT): – BTBT happens only when e-field is sufficiently high to cause a large band bending. S. Saha 11/27/202 0 Page 26

4(f). Effect of Scaled Channel Width The depletion region extends sideways in the areas outside the gate controlled region increasing the apparent channel width. As a result Vth opposite to short channel devices. S. Saha 11/27/202 0 Page 27