Linearly Compressed Pages A Low Complexity Low Latency

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Linearly Compressed Pages: A Low Complexity, Low Latency Main Memory Compression Framework Summary Challenge

Linearly Compressed Pages: A Low Complexity, Low Latency Main Memory Compression Framework Summary Challenge in Memory Compression § Main memory is a limited shared resource § Observation: Significant data redundancy § Idea: Compress data in main memory § Problem: How to avoid latency increase? § Solution: Linearly Compressed Pages (LCP): fixed-size cache line granularity compression Uncompressed Page Address Offset Compressed Page Address Offset 1. Increases capacity (62% on average) 2. Decreases bandwidth consumption (24%) 3. Improves overall performance (13. 9%) 4. Decreases memory energy consumption (9. 5%) Cache Line (64 B) L 1 L 2. . . LN-1 L 0 0 64 128 Uncompressed Page (4 KB: 64*64 B) (N-1)*64 . . . ? ? M Compressed Data (1 KB) § Metadata cache Avoids additional requests to metadata compression type, size, and extended physical base address § Memory bandwidth reduction § Operating System management support 64 B 64 B 4 memory transfers 4 memory pools (512 B, 1 KB, 2 KB, 4 KB) 4 cache lines in 1 transfer § Zero pages and zero cache lines Handled separately in TLB (1 -bit) and metadata (1 -bit per line ) Evaluated designs § Page Table entry extension 64 B Exception Storage E Metadata (64 B): ? (compressible) and ? (zero cache line) Methodology LCP Optimizations Base-Delta-Immediate (BDI) and Frequent Pattern Compression (FPC) 4: 1 Compression L 0 L 1 L 2. . . LN-1 0 ? . . . 64 B 64 B Challenge: Address Computation LCP Overview § Handling page overflows § Hardware support § Compression algorithms: Linearly Compressed Pages (LCP) No. Label Description 1 Baseline (no compression) 2 RMC-FPC Main memory compression 3 LCP-FPC using RMC and FPC LCP framework with FPC 4 LCP-BDI MXT LCP framework with BDI IBM MXT design 5 RMC-FPC 1, 59 LCP-FPC 1, 52 1, 00 Geo. Mean LCP-BDI 2. 31 1, 62 MXT 15% RMC-FPC LCP-BDI 10% 5% 0% 1 2 4 Cores SPEC 2006, databases, web workloads, L 2 2 MB cache G. Pekhimenko, V. Seshadri, Y. Kim, H. Xin, O. Mutlu, T. C. Mowry (CMU), P. B. Gibbons, M. A. Kozuch (Intel Normalized # of Page Faults 2, 5 2, 0 1, 5 1, 0 0, 5 0, 0 Baseline Performance Improvement Compression Ratio Key Results: Compression Ratio, Performance, Page Faults 1, 2 1 0, 8 0, 6 0, 4 0, 2 0 8% 256 MB Baseline 14% 512 MB DRAM Size MICRO 2013, Davis, CA LCP-BDI 23% 768 MB 21% 1 GB