LHC Beam Synchronous Timing BST based on Timing
LHC Beam Synchronous Timing (BST) based on Timing, Trigger and Control (TTC) System. • BST Requirements • TTC Features • BST Transmission over TTC • Issues & Planning. 7/12/2000 BI day 2000 J. J. Savioz SL/BI/EM 1
LHC Beam Synchronous Timing based on T. T. C. System. • BST Requirements Transmission to all acquisition crates of: > Timing Signals: Bunch Clock (40 MHz) Orbit Turn Clock (11 KHz) > Beam Synchronous commands: Injection Warnings. Acquisition triggers. Real time settings. Post Mortem commands. 7/12/2000 BI day 2000 J. J. Savioz SL/BI/EM 2
LHC Beam Synchronous Timing based on T. T. C. System. • BST Requirements • Do we use an updated LEP BST or new system for LHC ? • Main differences between LEP and LHC Requirements: Number of bunches : 16 2808 Minimum bunch Spacing : 335 25 ns Maximum Overall Jitter : 50 5 ns Number of bytes: 8 32 Number of acquisition crates: 60 300 Acquisition crates location : US + Tunnel ? > Reliability > Monitoring > Radiation hardness (Tunnel) After evaluation >> New system !! 7/12/2000 BI day 2000 J. J. Savioz SL/BI/EM 3
LHC Beam Synchronous Timing based on T. T. C. System. • TTC Features • Timing, Trigger and Control Systems for LHC Detectors : RD 12. Common Project financed entirely by the LHC experiment collaborations. • The TTC system provides the distribution of synchronous timing, trigger, and control signals, to electronics controllers relative to the LHC beam. • The TTC system uses single-mode fibre for the distribution of the machine timing signals from the PCR to the LHC experiment areas and radiationtolerant multi-mode fibre for local TTC distribution at the experiments. • TTC signals are encoded at 160 MBaud = 4 * 40 MHz LHC Bunch clock. • More details available on web site: http: //ttc. web. cern. ch/TTC/intro. html 7/12/2000 BI day 2000 J. J. Savioz SL/BI/EM 4
LHC Beam Synchronous Timing based on T. T. C. System. • TTC Bloc Diagram LHC Bunch. Clock ( 40 MHz ) VME Clock TTCVI A Channel L 1 A Trig 4 x FIFO Trig. 7/12/2000 Fifos B Channel 160 MBaud Encoder & Fibre Optic Transmitter Clock Fibre Optic Distribution Network BI day 2000 J. J. Savioz SL/BI/EM Fibre Optic Receiver & TTCRx L 1 A Ev. Cnt. Data Sub. Add 5
LHC Beam Synchronous Timing based on T. T. C. System. • TTC Frame Description 7/12/2000 BI day 2000 J. J. Savioz SL/BI/EM 6
LHC Beam Synchronous Timing based on T. T. C. System. • BST Transmission over TTC • Motivation: – Profit from RD 12 investment. – Common system for Experiment area & accelerator. – Use EP / ESS facilities. – Price ~ 200 FS/Channel (Without fibers) > > Save time & money ! • Implementation: ……. 7/12/2000 BI day 2000 J. J. Savioz SL/BI/EM 7
LHC Beam Synchronous Timing based on T. T. C. System. • BST Transmission over TTC Global distribution Local distribution Message Transmitter MASTER CRATE TTC minicrate TTCvi Encoder & Transmitter RF Signals To other TTC users TTCtx M. M. Tree Coupler To all Acquisition Crate S. M. Tree Coupler Single. Mode Fibers Acquisition CRATE To all Buildings TTC for all users 7/12/2000 TTC for BST only BI day 2000 J. J. Savioz SL/BI/EM TTCRx Message Receiver New BST Design 8
LHC Beam Synchronous Timing based on T. T. C. System. • Message Transmission 40 MHz Orbit 11 KHz Machine Events Beam Parameters Process Request New BST Design 7/12/2000 BST TTCVI MESSAGE PROCESSOR FIFO s TTC for BST only BI day 2000 J. J. Savioz SL/BI/EM CH A TTC Transmitter CH B CRATE Optical Distribution Global TTC 9
LHC Beam Synchronous Timing based on T. T. C. System. • Message Reception TTC Rx ASIC Optical Input 7/12/2000 BI day 2000 J. J. Savioz SL/BI/EM 10
LHC Beam Synchronous Timing based on T. T. C. System. • Message Reception Clock Bunch Clock L 1 A trigger Out Local Turn Clock Coarse Delay Hardware Selection Optical Input Event Number & IRQ Sub Ad Out Data Out I 2 C TTC Rx 7/12/2000 Hardware output Dual Ported Memory I 2 C Bus Interface Local Bus Interface & Local BUS Control logic New BST Design BI day 2000 J. J. Savioz SL/BI/EM 11
LHC Beam Synchronous Timing based on T. T. C. System. • Issues & Planning. • • • Propose solution within the context of Tim W. G. 2000 TTC Transmission test. “ TTC vi / BST compatibility test. “ Distribution in the Tunnel… ? Rx Platform… (VME/PCI) ? Final Specifications Early 2001 Hardware Prototype design 2001 Radiation Hardness test (if necessary) 2002 Software design 2002 1 st. batch manufacturing, test & installation 2003 TI 8 & 1 st LHC Octant Commissioning 2004 7/12/2000 BI day 2000 J. J. Savioz SL/BI/EM 12
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