Lecture 39 OUTLINE The MOSFET Subthreshold leakage current
Lecture #39 OUTLINE The MOSFET: • Sub-threshold leakage current • Gate-length scaling 1 Spring 2007 EE 130 Lecture 39, Slide 1
Sub-Threshold Leakage Current • We had previously assumed that there is no channel current when VGS < VT. This is incorrect. • If f. S > f. F, there is some inversion charge at the surface, which gives rise to sub-threshold current flowing between the source and drain: 2 Spring 2007 EE 130 Lecture 39, Slide 2
Sub-Threshold Slope S 3 Spring 2007 EE 130 Lecture 39, Slide 3
How to minimize S? 4 Spring 2007 EE 130 Lecture 39, Slide 4
MOSFET Scaling • MOSFETs have scaled in size over time – 1970’s: ~ 10 mm – Today: ~50 nm • Reasons: – Speed – Density 5 Spring 2007 EE 130 Lecture 39, Slide 5
Benefit of Transistor Scaling – IDS as L (decreased effective “R”) – Gate area as L (decreased load “C”) – Therefore, RC (implies faster switch) 6 Spring 2007 EE 130 Lecture 39, Slide 6
Circuit Example – CMOS Inverter 7 Spring 2007 EE 130 Lecture 39, Slide 7
td is reduced by increasing IDsat 8 Spring 2007 EE 130 Lecture 39, Slide 8
Constant-Field Scaling • Voltages and MOSFET dimensions are scaled by the same factor k>1, so that the electric field remains unchanged 9 Spring 2007 EE 130 Lecture 39, Slide 9
Constant-Field Scaling (cont. ) • Circuit speed improves by k • Power dissipation per function is reduced by k 2 10 Spring 2007 EE 130 Lecture 39, Slide 10
VT Design Trade-Off • Low VT is desirable for high ON current: IDsat (VDD - VT) 1< <2 • But high VT is needed for low OFF current: log IDS IOFF, low VT Low VT High VT IOFF, high 0 VT àVT cannot be scaled aggressively! VGS 11 Spring 2007 EE 130 Lecture 39, Slide 11
• Since VT cannot be scaled down aggressively, the power-supply voltage (VDD) has not been scaled down in proportion to the MOSFET channel length 12 Spring 2007 EE 130 Lecture 39, Slide 12
Generalized Scaling • Electric field intensity increases by a factor a>1 • Nbody must be scaled up by a to control short-channel effects • Reliability and power density are issues 13 Spring 2007 EE 130 Lecture 39, Slide 13
CMOS Scaling and the Power Crisis Power (W/cm 2) 1 E+03 Active Power Density 1 E+02 1 E+01 1 E+00 1 E-01 1 E-02 1 E-03 Passive Power Density 1 E-04 1 E-05 0. 01 0. 1 1 Gate Length (μm) Lg/VDD/VT trends increases in: • Active Power Density ( VDD 2) ~1. 3 X/generation • Passive Power Density ( VDD) ~3 X/generation • Gate Leakage Power Density >4 X/generation 2007 EE 130 Source: B. Spring Meyerson, IBM, Semico Conf. , January 2004 Lecture 39, Slide 14 14
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