Lecture 2 5 Instructions Branch and Jump Instructions
Lecture 2. 5 Instructions: Branch and Jump Instructions
Learning Objectives n n n Understand that instruction label cannot be presented in binary representation directly Understand that the offset (in branch) and the address (in jump) have the unit of word Use the address of the next instruction as the base address Covert branch and jump instructions between assembly statements and binary representations Use slt instruction with beq/bne to implement more complicated branch conditions Chapter 2 — Instructions: Language of the Computer — 2
Coverage n Textbook Chapter 2. 7 Chapter 2 — Instructions: Language of the Computer — 3
n Branch to a labeled instruction if a condition is true n n beq $rs, $rt, L 1 n n if (rs == rt) branch to instruction labeled L 1; bne $rs, $rt, L 1 n n Otherwise, continue sequentially § 2. 7 Instructions for Making Decisions Control Flow Instructions if (rs != rt) branch to instruction labeled L 1; Instruction Format (I format) op rs rt Offset 6 bits 5 bits 16 bits Chapter 2 — Instructions: Language of the Computer — 4
Compiling If Statements n C code: if (i==j) f = g+h; else f = g-h; n n f, g, h, i, j in $s 0, $s 1, $s 2, $s 3, $s 4 Compiled MIPS code: bne add j Else: sub Exit: … $s 3, $s 4, Else $s 0, $s 1, $s 2 Exit $s 0, $s 1, $s 2 Assembler calculates addresses Chapter 2 — Instructions: Language of the Computer — 5
Compiling If Statements n C code: if (i==j) f = g+h; else f = g-h; n n f, g, h, i, j in $s 0, $s 1, $s 2, $s 3, $s 4 Compiled MIPS code: beq sub j If: add Exit: … $s 3, $s 4, If $s 0, $s 1, $s 2 Exit $s 0, $s 1, $s 2 Assembler calculates addresses Chapter 2 — Instructions: Language of the Computer — 6
n Branch to a labeled instruction if a condition is true n n n Otherwise, continue sequentially beq $rs, $rt, L 1 bne $rs, $rt, L 1 Instruction Format (I format) op rs rt Offset 6 bits 5 bits 16 bits § 2. 7 Instructions for Making Decisions Control Flow Instructions How to specify the branch destination address? Chapter 2 — Instructions: Language of the Computer — 7
Specifying Branch Destinations n Use a base address (like in lw) added to the 16 -bit offset n Which register? Instruction Address Register (Program Counter) n n n Its use is automatically implied by instructions PC gets updated (PC+4) during the fetch stage so that it holds the address of the next instruction Instruction address is always the multiple of 4. The unit of the offset is word n Limit the branch distance to -215 to+215 -1 (word) instructions from the instruction after the branch instruction Chapter 2 — Instructions: Language of the Computer — 8
Calculate Branch Destination Address n n Target address = Base address + Offset × 4 Offset = (Target address – Base address) / 4 = Address difference / 4 n n Target address: the address of the labelled instruction Base address: the address of the instruction following the branch instruction Chapter 2 — Instructions: Language of the Computer — 9
Compiling Loop Statements n C code: while (save[i] == k) i += 1; n n n i in $s 3, k in $s 5, address of save[] in $s 6 All items in save[] are 32 -bit words Compiled MIPS code: Loop: sll add lw bne addi j Exit: … $t 1, $t 0, $s 3, Loop $s 3, 2 $t 1, $s 6 0($t 1) $s 5, Exit $s 3, 1 Chapter 2 — Instructions: Language of the Computer — 10
Branch Instruction Design n n Why not blt, bge, etc? Hardware for <, ≥, … slower than =, ≠ n n Combining comparisons such as “<” with branch involves more work for a branch instruction, requiring a slower clock All instructions are penalized! beq and bne are the common and fast cases This is a good design compromise Chapter 2 — Instructions: Language of the Computer — 11
In Support of Branch Instructions n n We have beq, bne, but what about other kinds of branches (e. g. , branch-if-less-than)? Set on less than instruction: n slt $rd, $rs, $rt n n n if (rs < rt) rd = 1; else rd = 0; Instruction format: R format Alternate versions of slt n n n sltu $rd, $rs, $rt slti $rt, $rs, Imm sltiu $rt, $rs, Imm # Sign. Ext Chapter 2 — Instructions: Language of the Computer — 12
Signed vs. Unsigned n n n Signed comparison: slt, slti Unsigned comparison: sltu, sltui Example n n n $s 0 = 1111 1111 $s 1 = 0000 0000 0001 slt $t 0, $s 1 # signed n n – 1 < +1 $t 0 = 1 sltu $t 0, $s 1 n # unsigned +4, 294, 967, 295 > +1 $t 0 = 0 Chapter 2 — Instructions: Language of the Computer — 13
Pseudo Branch Instructions n Can use slt, beq, bne, and the register $zero to create other conditions n less than slt bne n n blt $s 1, $s 2, Label $at, $s 1, $s 2 $at, $zero, Label less than or equal to greater than or equal to #$at set to 1 if #$s 1 < $s 2 ble $s 1, $s 2, Label bgt $s 1, $s 2, Label bge $s 1, $s 2, Label Such branches are included in the instruction set as pseudo instructions - recognized and expanded by the assembler n Assembler needs a reserved register ($at) Chapter 2 — Instructions: Language of the Computer — 14
Unconditional Jump n Jump (j) targets could be anywhere in text segment within 256 (i. e. , 228) MB n n n Encode full address in instruction Instruction format: J format op address 6 bits 26 bits (Pseudo)Direct jump addressing n n n Target address = (PC+4)31… 28: (address× 4) address× 4 = (Target address)27… 0 PC is the address of the jump instruction Chapter 2 — Instructions: Language of the Computer — 15
Form the target address from the low order 26 bits of the jump instruction 26 00 32 4 PC+4 n 32 Where the 4 bits come from? n The upper 4 bits of the address of the instruction following the Jump instruction Chapter 2 — Instructions: Language of the Computer — 16
Target Addressing Example n Loop code from earlier example n Assume Loop at location 80000 $t 1, $s 3, 2 80000 0 0 19 9 2 0 add $t 1, $s 6 80004 0 9 22 9 0 32 lw $t 0, 0($t 1) 80008 35 9 8 bne $t 0, $s 5, Exit 80012 5 8 21 addi $s 3, 1 80016 8 19 19 j 80020 2 Loop: sll Exit: … Loop 0 1 80024 Chapter 2 — Instructions: Language of the Computer — 17
Target Addressing Example n Loop code from earlier example n Assume Loop at location 80000 $t 1, $s 3, 2 80000 0 0 19 9 2 0 add $t 1, $s 6 80004 0 9 22 9 0 32 lw $t 0, 0($t 1) 80008 35 9 8 0 bne $t 0, $s 5, Exit 80012 5 8 21 2 addi $s 3, 1 80016 8 19 19 1 j 80020 2 Loop: sll Exit: … Loop 20000 80024 Chapter 2 — Instructions: Language of the Computer — 18
Branching Far Away n n If branch target is too far to encode with 16 -bit offset, assembler rewrites the code Example beq $s 0, $s 1, L 1 L 2: … ↓ bne $s 0, $s 1, L 2 j L 1 L 2: … Chapter 2 — Instructions: Language of the Computer — 19
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