LAV TDAq meeting Mauro Raggi Pisa 26032013 Questions

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LAV TDAq meeting Mauro Raggi Pisa 26/03/2013

LAV TDAq meeting Mauro Raggi Pisa 26/03/2013

Questions from Marco Assessment on the TDCB from sub-detectors. No clear statement on NOISE

Questions from Marco Assessment on the TDCB from sub-detectors. No clear statement on NOISE from our side to be tested We need to have a TEL 62 at LNF again for further tests Common TEL 62 firmware: current limitations, improvements and required features. Number of time slots to be read (leading to trailing distance) limit To. T efficiency No limit in time distance required for Leading and trailings Stand alone trigger mode. (board able to get trigger from its self and transmit without caring of LVL 0 from experiment) Needed due to poor acceptance of Vetos in coincidence with Q 1 signals Mauro Raggi

Expected rates (in my mind) Max rate 1. 77 MHz on full LAV means

Expected rates (in my mind) Max rate 1. 77 MHz on full LAV means 65 KHz on single channel In this case you foresee the presence of 4 -5 blocks which means 10 hits + noise in 2 adjacent 25 ns dived in 3 PPs At most 40 MHz hits per second on a single TEL 62 board order 10 MHz per PP Photon rate will be ~100 KHz (really we don’t know) in this case is even difficult to asses the exact number of block firing. We can imagine that most of events will have less than 20 hits per 25 ns There can be low rate huge events with up to >80 hits per 25 ns We will try to be more precise on that if needed Mauro Raggi

Sub detector requests Sub-detector specific TEL 62 firmware: sub-detector requirements, manpower, integration, data calibration

Sub detector requests Sub-detector specific TEL 62 firmware: sub-detector requirements, manpower, integration, data calibration and monitoring, trigger primitive generation. Need an off-spill data acquisition system to use LED to check integrity of the system Otherwise we need to have lots of self trigger going to disks in the in-spill time for each station (to get muons) Choice of TEL 62 FPGA size (LAV) Resources on the PP FPGA seem already short without doing complicated trigger primitive handling. Suspect that some sub-detector will run short in resources Mauro Raggi

Marco questions 2 Hardware status of TEL 62, repairs, We need TEL 62 of

Marco questions 2 Hardware status of TEL 62, repairs, We need TEL 62 of LAV 3 to be repaired Future common tests at CERN. Nice to have a dry run in July with all the 3 ANTI Foresee to test the readout of “many time slots” using pulsers or our led pulsing system Mauro Raggi

Crates Reprogramming of voltages has been painful We had many faults in Power Supplies

Crates Reprogramming of voltages has been painful We had many faults in Power Supplies The line 7. 5 V seems to be noisy at the level of few m. V thr they are spoiling the minimum thr in the LAV FEE wrt linear power supplies Support was not at all satisfactory in my view Mauro Raggi