JFET circuit applications JFETs are very useful active

JFET circuit applications • JFETs are very useful active devices and as a result they are used in many electronic circuit designs. They offer a number of distinct advantages that can be put to use in many circuits. • Simple biasing • High input impedance • Low noise • In view of their characteristics, JFETs are seen in many circuits ranging from amplifiers to oscillators, and logic switches to filters and many more applications.

JFET structure & fabrication • JFETs can be either N-channel of P-channel devices. They can be made in very similar manners, the main exception being that the N and P areas in the structure below are interchanged. • Often devices are made within a larger substrate and the FET itself fabricated as shown in the diagram below.

JFET structure & fabrication

JFET structure & fabrication • There a number of ways in which FETs can be fabricated. • For silicon devices a heavily doped substrate normally acts as a second gate. • The active n-type region may then be grown using epitaxy, or it may be formed by diffusing the impurities into the substrate or by ion implantation. • Where gallium arsenide is used the substrate is formed from a semi-insulating intrinsic layer. • This reduces the levels of any stray capacitances and enables good high frequency performance to be obtained. •

JFET structure & fabrication • Whatever the material used for the FET, the distance between the drain and source is important and should be kept to a minimum. • This reduces the transit times where high frequency performance is required, and gives a low on resistance that is vital when the device is to be used for power or switching applications. • Although the JFET is less popular than the MOSFET and fewer JFETs, it is still a very useful component. • Offering high input impedance, simple biasing, low noise, and a low cost, it provides a high level of performance which can be used in many situations.

MOSFET structure • As already implied the key factor of the MOSFET is the fact that the gate is insulated from the channel by a thin oxide layer. • This forms one of the key elements of its structure. • For an N-channel device the current flow is carried by electrons and in the diagram below it can be seen that the drain and source are formed using N+ regions which provide good conductivity for these regions. • In some structures the N+ regions are formed using ion implantation after the gate area has been formed. • In this way, they are self-aligned to the gate. • The gate to source and gate to drain overlap are required to ensure there is a continuous channel. • Also the device is often symmetrical and therefore source and drain can be interchanged. • On some higher power designs this may not always be the case.