Introduction to Micro Controllers Embedded System Design Instruction
Introduction to Micro Controllers & Embedded System Design Instruction set Department of Electrical & Computer Engineering Missouri University of Science & Technology hurson@mst. edu A. R. Hurson 1
Introduction to Micro Controllers & Embedded System Design • Instruction set of 8051 can be partitioned into five groups: • • • Arithmetic Logical Data Transfer Boolean variable, and Program branching A. R. Hurson 2
Introduction to Micro Controllers & Embedded System Design • Arithmetic instructions are: Instruction Format Mnemonic Length # of machine (byte) cycles Operand Semantics ADD A, Source Add source to A 1 -2 1 ADDC A, Source Add with carry 1 -2 1 SUBB A, Source Subtract from A 1 -2 1 INC A 1 1 INC Source 1 -2 1 DEC A 1 1 DEC Source 1 -2 1 INC DPTR 1 2 MUL AB 1 4 DIV A. R. Hurson 3
Introduction to Micro Controllers & Embedded System Design • Arithmetic instructions • Since 8051 supports different addressing modes ADD A, for example can be written in different ways: Instruction Format # of machine cycles Mnemonic Operand ADD A, 7 FH Direct addressing 2 1 ADDC A, @R 0 Indirect addressing 1 1 ADD A, R 7 Register addressing 1 1 ADD A, #35 H Immediate addressing 2 1 A. R. Hurson Semantics Length (byte) 4
Introduction to Micro Controllers & Embedded System Design • Arithmetic instructions: Instruction Format Mnemonic Format Operand Length # of machine (byte) cycles ADD A, Rn 00101 rrr 1 1 ADD A, direct 00100101 address 2 1 ADD A, @Ri 0010011 i 1 1 ADD A, #data 00100100 data 2 1 ADDC A, Rn 00110 rrr 1 1 ADDC A, direct 00110101 address 2 1 ADDC A, @Ri 0011011 i 1 1 ADDC A, #data 00110100 data 2 1 A. R. Hurson 5
Introduction to Micro Controllers & Embedded System Design • Arithmetic instructions: Instruction Format Mnemonic Format Operand Length (byte) # of machine cycles INC A 00000100 1 1 INC Rn 00001 rrr 1 1 INC Direct 00000101 address 2 1 INC @Ri 0000011 i 1 1 DEC A 00010100 1 1 DEC Rn 00011 rrr 1 1 DEC Direct 00010101 address 2 1 DEC @Ri 0001011 i 1 1 A. R. Hurson 6
Introduction to Micro Controllers & Embedded System Design • Arithmetic instructions: Instruction Format Mnemonic Operand Semantics Lengt h (byte) # of machine cycles SUBB A, Rn 10011 rrr 1 1 SUBB A, direct 10010101 address 2 1 SUBB A, @Ri 1001011 i 1 1 SUBB A, #data 10010100 data 2 1 INC DPTR 10100011 1 2 MUL AB 10100100 1 4 DIV AB 10000100 1 4 A. R. Hurson 7
Introduction to Micro Controllers & Embedded System Design • Arithmetic instructions Example: ADD A, #34 H ; Add 34 to the accumulator MOV A, #25 H MOV R 2, #34 H ADD A, R 2 A. R. Hurson 8
Introduction to Micro Controllers & Embedded System Design • Example: Accumulator contains 63 H, R 3 contains 23 H, and PSW contains 00 H: • A) what is the hexadecimal content of accumulator and PSW after execution of the following instruction? ADD • B) A, R 3 What is the content of accumulator in decimal A) ACC = 86 H and PSW = 05 H B) Decimal content of ACC = ? A. R. Hurson 9
Introduction to Micro Controllers & Embedded System Design • Note: Add instruction could change the AC, CY, or P bits of the flag register: Show the flag register contents after performing the following: MOV A, #0 F 5 H ADD A, #0 BH F 5 H + 0 BH 100 H CY =1 P=0 AC = 1 A. R. Hurson 11110101 + 00001011 1 0000 since there is a carry out since result has even number of 1 s since there is a carry from D 3 to D 4 10
Introduction to Micro Controllers & Embedded System Design Add the following 5 bytes of data, the sum is kept in R 7 and Accumulator: Address 40 41 42 43 44 A. R. Hurson Content 7 D EB C 5 5 B 30 11
Introduction to Micro Controllers & Embedded System Design MOV CLR MOV AGAIN: ADD JNC INC NEXT: INC DJNZ 1 s t iteration 2 nd iteration 3 rd iteration 4 th iteration 5 st iteration A. R. Hurson R 0, #40 H R 2, #5 A R 7, A A, @R 0 NEXT R 7 R 0 R 2, AGAIN A = 7 D, CY = 0 A = 68, CY = 1 A = 2 D, CY = 1 A = 88, CY = 0 A = B 8, CY = 0 ; indirect addressing ; setting loop counter R 7 = 0 R 7 = 1 R 7 = 2 12
Introduction to Micro Controllers & Embedded System Design Analyze the following: Adding 2 16 -bit numbers and saving the result in R 6 (low byte of sum) and R 7 (high byte of sum). CLR MOV ADDC MOV C A, #0 E 7 H A, #8 DH R 6, A A, #36 H A, #3 BH R 7, A A. R. Hurson 13
Introduction to Micro Controllers & Embedded System Design • Example: Write a sequence of instructions to subtract content of R 6 from R 7 and leave the result in R 7. MOV CLR SUBB MOV A. R. Hurson A, R 7 C A, R 6 R 7, A 14
Introduction to Micro Controllers & Embedded System Design • The general format of subtract instruction is: SUBB A - source - CY • In 8051, subtraction is performed as 2’s complement addition: • • • Take 2’s complement of subtrahend Add it to accumulator Invert carry After the operation: if CY = 0 the result is positive, if CY = 1 the result is negative and destination has 2’s complement of the result. A. R. Hurson 15
Introduction to Micro Controllers & Embedded System Design • Analyze the following NEXT: A. R. Hurson CLR MOV SUBB JNC CPL INC MOV C A, #4 CH A, #6 EH NEXT A A R 1, A 16
Introduction to Micro Controllers & Embedded System Design • Analyze the following CLR MOV SUBB MOV A. R. Hurson C A, #62 H A, #96 H R 7, A A, #27 H A, #12 H R 6, A 17
Introduction to Micro Controllers & Embedded System Design • Note: any location in local RAM can be incremented or decremented using direct addressing: INC 7 FH A. R. Hurson 18
Introduction to Micro Controllers & Embedded System Design • Binary Coded Decimal • In an unpacked BCD, a byte is going to represent a decimal digit: high order half byte (a nible) is all zeros. i. e. , 9 = 00001001 • • In a packed BCD, a byte represents two decimal digits In adding packed BCD numbers, we need to make sure to check that each nible of the sum is not greater than 9. If it is then we need to add 6 (0110) to correct the result. A. R. Hurson 19
Introduction to Micro Controllers & Embedded System Design • Binary Coded Decimal • DA A instruction is intended to resolve the aforementioned issue (it adds 0110 to the low and/or high nibles as needed). • Note: DA instruction must be used after addition of BCD operands. It will not work after any other arithmetic instruction such as INC. A. R. Hurson 20
Introduction to Micro Controllers & Embedded System Design Assume the following 5 BCD data is stored in RAM. Analyze the Following code: Address 40 41 42 43 44 A. R. Hurson Content 71 11 65 59 37 21
Introduction to Micro Controllers & Embedded System Design MOV CLR MOV AGAIN: ADD DA JNC INC NEXT: INC DJNZ A. R. Hurson R 0, #40 H R 2, #5 A R 7, A A, @R 0 A NEXT R 7 R 0 R 2, AGAIN ; indirect addressing ; setting loop counter 22
Introduction to Micro Controllers & Embedded System Design • The general format of Multiplication operation is: MUL AB ; A * B, places the result in B and A MOV A, #25 H MOV B, #65 H MUL AB 25 H * 65 H = E 99 H B = 0 EH A = 99 H A. R. Hurson 23
Introduction to Micro Controllers & Embedded System Design • The general format of division operation is: DIV MOV DIV AB ; Divides A by B, places the quotient in ; A and the remainder in B A, #95 B, #10 AB B = 05 A = 09 A. R. Hurson 24
Introduction to Micro Controllers & Embedded System Design • Logical instructions include: Instruction Format Mnemonic Operand Semantics Length (byte) #of machine cycles ANL A, Source Logical AND 1 -3 1 -2 ORL A, Source Logical OR 1 -3 1 -2 XRL A, Source Logical XOR 1 -3 1 -2 CLR A Clear A 1 1 CPL A Complement A 1 1 RL A Rotate A left 1 1 RR A Rotate A right 1 1 RLC A Rotate A left through C 1 1 RRC A Rotate A right through C 1 1 A Swap nibbles 1 1 SWAP A. R. Hurson 25
Introduction to Micro Controllers & Embedded System Design • Logical instructions • As in case of arithmetic instructions, since 8051 supports different addressing modes each logical operation has different flavor, for example: Instruction Format #of machine cycles Mnemonic Operand ANL A, 55 H Direct addressing 2 1 ANL A, @R 0 Indirect addressing 1 1 ANL A, R 6 Register addressing 1 1 ANL A, #33 H Immediate addressing 2 1 A. R. Hurson Semantics Length (byte) 26
Introduction to Micro Controllers & Embedded System Design • Logical instructions • Rotating the bits of accumulator to right or left has the following general formats: RR A MSB Rotate Right A. R. Hurson and LSB RL A MSB Rotate Left LSB 27
Introduction to Micro Controllers & Embedded System Design • Logical instructions • Rotating the bits of accumulator to right or left through the carry has the following general formats: RRC A and C Y MSB RRC A. R. Hurson A LSB RLC A C Y MSB RLC A LSB 28
Introduction to Micro Controllers & Embedded System Design • Logical instructions • Note: Logical operations can be performed on any byte of the internal memory space XRL P 1, #0 FFH A. R. Hurson 29
Introduction to Micro Controllers & Embedded System Design • Logical instructions • SWAP A instruction exchanges the high and low nibbles within the accumulator. D 7 – D 4 Before A. R. Hurson D 3 – D 0 D 7 – D 4 After 30
Introduction to Micro Controllers & Embedded System Design • Serializing a byte of data • This can be done by repeating the following sequence of instructions: RRC A MOV P 1. 3, C A. R. Hurson ; Move a bit to CY ; output a bit of data 31
Introduction to Micro Controllers & Embedded System Design • Logical instructions: Instruction Format Mnemonic Format Operand Length # of machine (byte) cycles ANL A, Rn 01011 rrr 1 1 ANL A, direct 0101 address 2 1 ANL A, @Ri 0101011 i 1 1 ANL A, #data 01010100 data 2 1 ANL Direct, A 01010010 address 2 1 ANL Direct, #data 01010011 address data 3 2 A. R. Hurson 32
Introduction to Micro Controllers & Embedded System Design • Logical instructions: Instruction Format Mnemonic Format Operand Length # of machine (byte) cycles ORL A, Rn 01001 rrr 1 1 ORL A, direct 01000101 address 2 1 ORL A, @Ri 0100011 i 1 1 ORL A, #data 0100 data 2 1 ORL Direct, A 01000010 address 2 1 ORL Direct, #data 01000011 address data 3 2 A. R. Hurson 33
Introduction to Micro Controllers & Embedded System Design • Logical instructions: Instruction Format Mnemonic Format Operand Length # of machine (byte) cycles XRL A, Rn 01101 rrr 1 1 XRL A, direct 01100101 address 2 1 XRL A, @Ri 0110011 i 1 1 XRL A, #data 01100100 data 2 1 XRL Direct, A 01100010 address 2 1 XRL Direct, #data 01100011 address data 3 2 A. R. Hurson 34
Introduction to Micro Controllers & Embedded System Design • Logical instructions: Instruction Format Length (byte) # of machine cycles Mnemonic Operand CLR A 11100100 1 1 CPL A 11110100 1 1 RL A 00100011 1 1 RLC A 0011 1 1 RR A 00000011 1 1 RRC A 00010011 1 1 SWAP A 11000100 1 1 A. R. Hurson 35
Introduction to Micro Controllers & Embedded System Design • Write a program to transfer 41 H serially via pin P 2. 1, puts two high at the beginning and end of the data: MOV SETB MOV HERE: RRC MOV DJNZ SETB A. R. Hurson A, #41 H P 2. 1 R 5, #8 A P 2. 1, C R 5, HERE P 2. 1 ; High ; Loop counter 36
Introduction to Micro Controllers & Embedded System Design • Write a program to count number of 1 s in a given byte: MOV MOV AGAIN: NEXT: A. R. Hurson R 1, #0 R 7, #8 A, #97 H ; R 1 is the counter ; Loop counter ; Desired value RLC A JNC NEXT INC R 1 DJNZ R 7, AGAIN 37
Introduction to Micro Controllers & Embedded System Design • Data Transfer instructions are: Instruction Format Mnemonic Operand Semantics Length (byte) #of machine cycles 1 -2 1 1 2 MOV A, Source Move source to destination MOVC A, @ A+DPTR Move from code memory MOVC A, @ A+PC Move from code memory MOVX A, @Ri Move from data memory MOVX A, @ DPTR 1 2 MOVX @Ri, A 1 2 PUSH Direct 2 2 POP Direct 2 2 XCH A, Source Exchange bytes 1 1 XCHD A, @Ri Exchange low order digits 1 1 A. R. Hurson 38
Introduction to Micro Controllers & Embedded System Design • Data Transfer instructions: Instruction Format Mnemonic Format Operand Length (byte) # of machine cycles MOV A, Rn 11101 rrr 1 1 MOV A, direct 11100101 address 2 1 MOV A, @Ri 1110011 i 1 1 MOV A, data 01110100 data 2 1 MOV direct, @Ri 1000011 iaddress 2 2 MOV direct, data 01110101 addressdata 3 2 MOV @Ri, A 1111011 i 1 1 MOV @Ri, direct 1010011 iaddress 2 2 MOV @Ri, data 0111011 idata 2 1 A. R. Hurson 39
Introduction to Micro Controllers & Embedded System Design • Data Transfer instructions: Instruction Format Mnemonic Format Operand Length (byte) # of machine cycles MOV Rn, A 11111 rrr 1 1 MOV Rn, direct 10101 rrraddress 2 2 MOV Rn, data 01111 rrrdata 2 1 MOV direct, A 11110101 address 2 1 MOV direct, Rn 10001 rrraddress 2 2 MOV direct, direct 10000101 address 3 2 A. R. Hurson 40
Introduction to Micro Controllers & Embedded System Design • Data Transfer instructions: Instruction Format Mnemonic Format Operand Length (byte) # of machine cycles MOV C, bit 10100010 bbb 2 1 MOV bit, C 10010010 bit address 2 2 MOV DPTR, data 16 10010000 data 3 2 MOVC A, @A+DPTR 10010011 1 2 MOVC A, @A+PC 10000011 1 2 MOVX A, @Ri 1110001 i 1 2 MOVX A, @DPTR 11100000 1 2 MOVX @Ri, A 1111001 i 1 2 MOVX @DPTR, A 11110000 1 2 A. R. Hurson 41
Introduction to Micro Controllers & Embedded System Design • Data Transfer instructions: Instruction Format Mnemonic Format Length (byte) # of machine cycles Operand PUSH direct 11000000 address 2 2 POP direct 11010000 address 2 2 XCH A, Rn 11001 rrr 1 1 XCH A, direct 11000101 address 2 1 XCH A, @Ri 1100011 i 1 1 XCH A, @Ri 1101011 i 1 1 A. R. Hurson 42
Introduction to Micro Controllers & Embedded System Design • Data Transfer instructions • Internal RAM • Instructions that move data within the internal memory spaces execute in either one or two machine cycles. MOV Destination, Source allows data to be transferred directly between any two internal RAM and SFR locations. • Note: the upper 128 bytes of RAM are accessed only by indirect addressing and SFRs are accessed only by direct addressing. • Note: Stack resides in on-chip RAM and grows upward in memory. A. R. Hurson 43
Introduction to Micro Controllers & Embedded System Design • Data Transfer instructions Example: MOV R 1, #12 ; Load 12 decimal (immediate addressing) ; to register R 1 MOV R 5, #0 F 9 H ; Load F 9 (hexadecimanl) to R 5 ; 0 is added to indicate F as a number not ; a letter Note: Value (i. e. , immediate addressing) can be moved directly to any A, B or R 1 -R 7 registers. A. R. Hurson 44
Introduction to Micro Controllers & Embedded System Design • Data Transfer instructions Example: MOV A, #5 ; 5 will be extended by zeros to the left ; and loaded into a register. ; This will result A = 0000101 MOV A, #256 ; Moving a value larger than 8 bits will ; cause an error MOV A, 17 H ; 17 H is the address (direct addressing) ; of a location. Content of this location ; is moved to accumulator. A. R. Hurson 45
Introduction to Micro Controllers & Embedded System Design • Example MOV A, #55 H ; Load value 55 in hexadecimal ; into accumulator MOV R 0, A ; Copy content of accumulator ; to register R 0 A. R. Hurson 46
Introduction to Micro Controllers & Embedded System Design • Data Transfer instructions • External RAM • The data transfer instructions that move data between internal memory and external memory use indirect addressing. • The indirect address is specified using a 1 -byte address (@Ri, where Ri is either R 0 or R 1 of the active bank) or a 2 -byte address (@DPTR). • All data transfer instructions that operate on external memory execute in two machine cycles and uses accumulator as either source or destination. A. R. Hurson 47
Introduction to Micro Controllers & Embedded System Design • Data Transfer instructions • Look up Tables • Two data transfer instructions are dedicated for reading look up tables in program memory: • MOVC (move constant) uses either the program counter or DPTR as the base register and the accumulator as the offset. MOVC A, @A + DPTR Accommodates a table of 256 entries (numbered 0 to 255). The number of desired entry is loaded into the accumulator and the data pointer is initialized to the beginning of the table. MOVC A, @A + PC works the same way, except PC is used as the base register. A. R. Hurson 48
Introduction to Micro Controllers & Embedded System Design • Data Transfer instructions • Look up Tables • The table is usually accessed through a subroutine: LOOK-UP: TABLE: A. R. Hurson MOV CALL INC MOVC RET DB A, #Entry Look-up A A, @A + PC data, … 49
Introduction to Micro Controllers & Embedded System Design • Boolean instructions: • 8051 supports a complete bit-slice Boolean processing. The internal RAM contains 128 addressable bits and SFR space supports up to 128 other addressable bits. In addition, all port lines are bit addressable and each can be treated as a separate single-bit port. • Instructions that access these bit are: move, set, clear, complement, OR, and AND. A. R. Hurson 50
Introduction to Micro Controllers & Embedded System Design • Boolean instructions: Instruction Format Mnemonic A. R. Hurson Operand Semantics CLR C Clear bit CLR bit SETB C SETB bit CPL C CPL bit ANL C, bit AND bit with C ANL C, /bit AND NOT bit with C ORL C, bit OR bit with C ORL C, /bit OR NOT bit with C Set bit Complement bit 51
Introduction to Micro Controllers & Embedded System Design • Boolean instructions: Instruction Format Mnemonic A. R. Hurson Operand Semantics MOV C, bit Move bit to bit MOV Bit, C JC rel Jump if C set JNC rel Jump if C NOT set JB Bit, rel Jump if bit set JNB Bit, rel Jump if bit NOT set JBC Bit, rel Jump if bit set and then clear 52
Introduction to Micro Controllers & Embedded System Design • Boolean instructions: Instruction Format Mnemonic Format Operand Length (byte) # of machine cycles CLR C 11000011 1 1 CLR bit 11000010 bbb 2 1 CPL C 10110011 1 1 CPL bit 10110010 bbb 2 1 SETB C 11010011 1 1 SETB bit 11010010 bbb 2 1 ANL C, bit 10000010 bbb 2 2 ANL C, /bit 10110000 bbb 2 2 ORL C, bit 01110010 bbb 2 2 C, /bit 10100000 bbb 2 2 ORL A. R. Hurson 53
Introduction to Micro Controllers & Embedded System Design • Boolean instructions: Instruction Format Mnemonic Format Operand Length (byte) # of machine cycles MOV C, bit 10100010 bbb 2 1 MOV bit, C 10010010 bit address 2 2 JC rel 01000000 eee 2 2 JNC rel 01010000 eee 2 2 JB bit, rel 00100000 bbbeee 3 2 JNB bit, rel 00110000 bbbeee 3 2 JBC bit, rel 00010000 bbbeee 3 2 A. R. Hurson 54
Introduction to Micro Controllers & Embedded System Design • Boolean instructions: • Example: The following sequence of instructions performs XOR operation: SKIP: A. R. Hurson MOV C, BIT 1 JNB BIT 2, SKIP CPL C (continue) 55
Introduction to Micro Controllers & Embedded System Design • Boolean instructions: • Example: Suppose one wants to compute the logical AND of the input signals on bit 0 and bit 1 of port 1 and output the result to bit 2 of port 1: LOOP: MOV ANL MOV SJMP A. R. Hurson C, P 1. 0 C, P 1. 1 P 1. 2, C LOOP 1 cycle 2 cycles 56
Introduction to Micro Controllers & Embedded System Design • Program branching instructions: • Branching instructions are intended to control flow of the operations in a program. They include call and return from subroutine, and conditional and unconditional branching. • Note that these set of instructions are enhanced by different addressing modes. A. R. Hurson 57
Introduction to Micro Controllers & Embedded System Design • Program branching instructions: • There are three variations of jump instruction: SJMP, LJMP, and AJMP which stand for relative, long, and absolute addressing, respectively. A. R. Hurson 58
Introduction to Micro Controllers & Embedded System Design • Program branching instructions: • The SJMP instruction specifies the destination as a relative offset. Since the instruction is two bytes long, the jump distance is limited to -128 to +127 bytes relative to the address following the SJMP. A. R. Hurson 59
Introduction to Micro Controllers & Embedded System Design • Program branching instructions: • The LJMP instruction specifies the destination as a 16 bit constant. Since the instruction is three bytes long, the destination address can be anywhere in the 64 K program space. A. R. Hurson 60
Introduction to Micro Controllers & Embedded System Design • Program branching instructions: • The AJMP instruction specifies the destination as an 11 -bit constant. The op. code contains 3 bits of 11 address bits. • When this instruction is executed, the 11 -bit address replaces the low order 11 bits of the PC and the high order five bits of PC remains unchanged. The destination, therefore, must be within the same 2 K block as the instruction following the AJMP. A. R. Hurson 61
Introduction to Micro Controllers & Embedded System Design • Program branching instructions: Instruction Format Mnemonic Operand Semantics Format Length (byte) machine cycles ACALL Address 11 Call subroutine aaa 10001 aaa 2 2 LCALL Address 16 Call subroutine 00010010 aaaaaa 3 2 RET Return from subroutine 0010 1 2 RETI Return from interrupt 00110010 1 2 AJMP Address 11 aaa 00001 aaa 2 2 LJMP Address 16 00000010 aaaaaa 3 2 SJMP Relative 10000000 eee 2 2 JMP @A + DPTR 01110011 1 2 A. R. Hurson 62
Introduction to Micro Controllers & Embedded System Design • Program branching instructions: Instruction Format Mnemonic Format Length Cycles Operand JZ Relative 01100000 eee 2 2 JNZ Relative 01110000 eee 2 2 CJNE A, direct, relative 10110101 aaaeee 3 2 CJNE A, #data, relative 10110100 dddeee 3 2 CJNE Rn, #data, relative 10111 rrrdddeee 3 2 CJNE @Ri, #data, relative 1011011 idddeee 3 2 DJNZ Rn, relative 11011 rrreee 2 2 DJNZ Direct, relative 11010101 aaaeee 3 2 0000 1 1 NOP A. R. Hurson 63
Introduction to Micro Controllers & Embedded System Design • Program branching instructions: Instruction Format Mnemonic Operand Semantics JZ Relative Jump if A = 0 JNZ Relative Jump if A NOT = 0 CJNE A, direct, relative Compare and jump if not equal CJNE A, #data, relative CJNE Rn, #data, relative CJNE @Ri, #data, relative DJNZ Rn, relative DJNZ Direct, relative NOP A. R. Hurson Decrement and jump if NOT zero No operation 64
Introduction to Micro Controllers & Embedded System Design • Program branching instructions • Jump Tables • The JMP @A + DPTR instruction supports CASEDependent jumps for jump tables. • The destination address is computed at execution time as the sum of 16 -bit DPTR register and accumulator. A. R. Hurson 65
Introduction to Micro Controllers & Embedded System Design • Program branching instructions • Jump Tables Example • Note: MOV RL JMP DPTR, #JUMP_TABLE A, #INDEX_NUMBER A @A + DPTR acts as the base and accumulator acts as an index. • Note: RL A instruction multiplies accumulator by 2 since each entry in the “jump-table” is two bytes long. A. R. Hurson 66
Introduction to Micro Controllers & Embedded System Design • Program branching instructions • Jump Tables JUMP_TABLE: A. R. Hurson AJMP CASE 0 CASE 1 CASE 2 CASE 3 67
Introduction to Micro Controllers & Embedded System Design • Program branching instructions Example: Assume the jump table in the previous example starts at memory location 8100 H with the following values: Address Content A. R. Hurson 8100 01 8101 B 8 8102 01 8103 43 8104 41 8105 76 8106 E 1 8107 F 0 68
Introduction to Micro Controllers & Embedded System Design • Program branching instructions a) What is the beginning and ending addresses of the 2 K block of the code memory in which these instructions reside? b) At what addresses do CASE 0 through CASE 3 begin? a) 8000 H to 87 FFH b) CASE 0 begins at address 80 B 8 H CASE 1 begins at address 8043 H CASE 2 begins at address 8276 H CASE 3 begins at address 87 F 0 H A. R. Hurson 69
Introduction to Micro Controllers & Embedded System Design • Program branching instructions • Subroutines and Interrupts • There are two variations of CALL: ACALL and LCALL using absolute and long addressing, respectively. Either instruction pushes the value of the program counter into the stack and loads the program counter with the address specified in the instruction. • The PC is pushed into the stack, low-byte first and high-byte second. • The bytes are popped from the stack in reverse order; highbyte first and low-byte second. A. R. Hurson 70
Introduction to Micro Controllers & Embedded System Design • Program branching instructions • Subroutines and Interrupts Example: An LCALL instruction is at address 1000 H-1002 H and the stack pointer contains 20 H, then the LCALL a) Pushes the return address 1003 H into the stack, placing 03 H in 21 H and 10 H in 22 H b) c) Leaves the stack pointer containing 22 H, and Jumps to the subroutine by loading the PC with the address contained in bytes 2 and 3 of the instruction. A. R. Hurson 71
Introduction to Micro Controllers & Embedded System Design • Program branching instructions • Subroutines and Interrupts Example: The following instruction LCALL COSINE Is at address 0204 H through 0206 H and the subroutine COSINE is at address 043 AH. Assume stack pointer contains 3 AH. What internal RAM locations are altered and what are their new values after execution of LCALL instruction? Address 3 BH 3 CH 81 H (stack pointer) A. R. Hurson Contents 07 H 02 H 3 CH 72
Introduction to Micro Controllers & Embedded System Design • Program branching instructions • Subroutines and Interrupts • Subroutines should end with a RET instruction. This instruction pops the stack into the program counter to allow the execution of the instruction after CALL. • RETI instruction is used to return from an interrupt service routine (ISR). RETI also signals the interrupt control system that the interrupt in progress is done. • If there is no other pending interrupt at the time RETI is executed, the RETI is functioning the same as RET instruction. A. R. Hurson 73
Introduction to Micro Controllers & Embedded System Design • Program branching instructions • Conditional jumps • 8051 offers a variety of conditional jump instructions, all specify the destination addressing using relative addressing, hence it is limited to a jump distance of -128 to +127 bytes from the instruction following the conditional jump instruction. • Note: The DJNZ and CJNE instructions are for loop control. For example, to execute a loop N times, load a counter byte with N and terminate the loop with a DJNZ to the beginning of the loop. A. R. Hurson 74
Introduction to Micro Controllers & Embedded System Design • CJNE instruction has the following general format: CJNE Destination, Source, relative address Accumulator or one of the Rn registers Register, memory, or an immediate value • Note: This instruction effects the value of CY flag to indicate if the destination operand is larger or smaller. A. R. Hurson 75
Introduction to Micro Controllers & Embedded System Design • Program branching instructions • Conditional jumps Example: The following code shows a loop that is iterated 10 times. LOOP: A. R. Hurson MOV R 7, #10 (begin loop) (end loop) DNJZ R 7, LOOP 76
Introduction to Micro Controllers & Embedded System Design • Program branching instructions • Conditional jumps Example: Suppose a character is read from the serial port and it is desired to jump to an instruction designated as “TERMINATE”, if it is 03 H. The following code shows this process. SKIP: A. R. Hurson CJNE A, #03 H, SKIP SJMP TERMINATE (continue) 77
Introduction to Micro Controllers & Embedded System Design • Write a program to get a byte of hex data from input port P 1 in the range of 00 -FFH and convert it to decimal. MOV MOV DIV MOV MOV A. R. Hurson A, #0 FFH P 1, A A, P 1 B, #10 AB R 7, B B, #10 AB R 6, B R 5, A ; read data from P 1 ; B is 0 AH = 10 decimal 78
Introduction to Micro Controllers & Embedded System Design • Assume bit P 2. 3 is an input and represent the condition of a door. If it goes high, it indicates that the door is open. Monitor the door constantly, whenever, it goes high send a low-to-high pulse to port P 1. 5 to turn a buzzer. P 2. 3 8051 Buzzer P 1. 5 A. R. Hurson HERE: JNB CLR ACALL SETB ACALL SJML P 2. 3, HERE P 1. 5 DELAY HERE 79
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