Introduction Jan M Rabaey Low Power Design Essentials

Why Worry about Power? The Tongue-in-Cheek Answer § Total Energy of Milky Way Galaxy: 1059 J § Minimum switching energy for digital gate (1 electron@100 m. V): 1. 6 10 -20 J (limited by thermal noise) § Upper bound on number of digital operations: 6 1078 § Operations/year performed by 1 billion 100 MOPS computers: 3 1024 § Energy consumed in 180 years, assuming a doubling of computational requirements every year (Moore’s Law). Low Power Design Essentials © 2008 1. 2

Power the Dominant Design Constraint (1) Cost of large data centers solely determined by power bill … Columbia River NY Times, June 06 Google Data Center, The Dalles, Oregon 450, 000 § 400 Millions of Personal Computers worldwide (Year 2000) - Assumed to consume 0. 16 Tera (1012) k. Wh per year - Equivalent to 26 nuclear power plants 8, 000 100, 000 § Over 1 Giga k. Wh per year just for cooling - Including manufacturing electricity [Ref: Bar-Cohen et al. , 2000] Low Power Design Essentials © 2008 1. 3

Power the Dominant Design Constraint Low Power Design Essentials © 2008 [Ref: R. Schmidt,

Chip Architecture and Power Density Integration of diverse functionality on So. C causes major variations in activity (and hence power density) Today: steep gradients The past: temperature uniformity Temperature variations cause performance degradation – higher temperature means slower clock speed Low Power Design Essentials © 2008 [Ref: R. Yung, ESSCIRC’ 02] 1. 5

Temperature Gradients (and Performance) Copper hat (heat sink on top not shown) Si. C spreader (chip underneath spreader) Glass ceramic substrate IBM Power PC 4 temperature map Hot spot: 138 W/cm 2 (3. 6 x chip avg flux) Low Power Design Essentials © 2008 [Ref: R. Schmidt, ACEED’ 03] 1. 6

Power the Dominant Design Constraint (2) © IEEE 2004 Power consumption and Battery Capacity Trends Mobile Functionality Limited by Energy Budget Size of mobile sets energy supply Low Power Design Essentials © 2008 [Ref: Y. Nuevo, ISSCC’ 04] 1. 7

Mobile Functionality Limited by Energy Budget © Springer 2005 Energy hierarchy in “ambient intelligent”

Battery Storage a Limiting Factor § Basic technology has evolved little – store energy using a chemical reaction § Battery capacity increases between 3% and 7 % per year (doubled during the 90’s, relatively flat before that) § Energy density/size, safe handling are limiting factor For extensive information on energy density of various materials, check http: //en. wikipedia. org/wiki/Energy_density Low Power Design Essentials © 2008 1. 9

Battery Evolution Accelerated since the 1990’s, but slower than IC power growth. Low Power

Battery Technology Saturating Battery capacity naturally plateaus as systems develop Low Power Design Essentials

Need Higher Energy Density H Low Power Design Essentials © 2008 [Ref: R. Nowak, SECA’ 01] - Load + Oxidant Cathode Electrolyte Anode + ions Fuel 2 H 2 4 H+ + 4 e- e - O 2 + 4 H+ + 4 e- 2 H 2 O Fuel cells may increase stored energy more than a order of magnitude Example: Methanol = 5 k. Wh/kg O 1. 12

Fuel Cells Methanol fuel-cells for portable pc’s and mp 3 players Portable mp 3 fuel cell (300 m. W from 10 ml reservoir) Fuel cell for pc (12 W avg – 24% effiency) Low Power Design Essentials © 2008 [Ref: Toshiba, 2003 -2004] 1. 13

Micro-batteries When Size is an Issue Using micro-electronics or thin-film manufacturing techniques to create integrate miniature (back-up) batteries on chip or on board Battery printed on wireless sensor node Stencil press for printing patterns Low Power Design Essentials © 2008 [Courtesy: P. Wright, D. Steingart, UCB] 1. 14

How much Energy Storage in 1 cm 3? J/cm 3 ultracapacitor m. W/cm 3/year Micro Fuel cell 3500 110 Primary battery 2880 90 Secondary battery 1080 34 Ultracapacitor 100 3. 2 Micro fuel cell ultracapacitor Low Power Design Essentials © 2008 1. 15

Power The Dominant Design Constraint (3) Exciting emerging applications require “zero-power” Example: Computation/Communication Nodes for Wireless Sensor Networks Meso-scale low-cost wireless transceivers for ubiquitous wireless data acquisition that • are fully integrated – Size smaller than 1 cm 3 • are dirt cheap – At or below 1$ • minimize power/energy dissipation – Limiting power dissipation to 100 m. W enables energy scavenging • and form self-configuring, robust, ad-hoc networks containing 100’s to 1000’s of nodes Low Power Design Essentials © 2008 [Ref: J. Rabaey, ISSCC’ 01] 1. 16

How to Make Electronics Truly Disappear? From 10’s of cm 3 and 10’s to

Power the Dominant Design Constraint Exciting emerging applications require “zero-power” Smart Surfaces Artificial Skin Real-time Health Monitoring Still at least one order of magnitude away UCB Pico. Cube Philips Sand module Low Power Design Essentials © 2008 UCB mm 3 radio 1. 18

How much Energy Can One Scavenge in 1 cm 3? Thermal Vibrations m. W/cm 3 Solar (outside) 15, 000 Air flow 380 Human power 330 Vibration 200 Temperature 40 Pressure Var. 17 Solar (inside) 10 Air Flow Solar Low Power Design Essentials © 2008 1. 19

A Side Note: What can one do with 1 cm 3? Reference case: the human brain Pavg(brain) = 20 W (20% of the total dissipation, 2% of the weight), Power density: ~15 m. W/cm 3 Nerve cells only 4% of brain volume Average neuron density: 70 million/cm 3 Low Power Design Essentials © 2008 1. 20

Power versus Energy § Power in high performance systems – Heat removal – Peak power - power delivery § Energy in portable systems – Battery life § Energy/power in “zero-power systems” – Energy-scavenging and storage capabilites § Dynamic (energy) vs. static (power) consumption – Determined by operation modes Low Power Design Essentials © 2008 1. 21

Power Evolution over Technology Generations 14 © ASME 2004 12 Module Heat Flux(watts/cm 2) CMOS IBM ES 9000 Prescott Jayhawk(dual) Bipolar 10 T-Rex Mckinley Squadrons Fujitsu VP 2000 8 IBM GP IBM 3090 S NTT 6 IBM RY 5 Pentium 4 IBM RY 7 Fujitsu M-780 Pulsar 4 IBM 3090 Start of Water Cooling 2 Vacuum 0 1950 IBM 360 IBM 370 CDC Cyber 205 IBM 4381 IBM 3081 Fujitsu M 380 IBM 3033 IBM RY 6 IBM RY 4 Apache Merced Pentium II(DSIP) 1960 1970 1980 1990 2000 2010 Year of Announcement Introduction of CMOS over bipolar bought industry 10 years (example: IBM mainframe processors) Low Power Design Essentials © 2008 [Ref: R. Chu, JEP’ 04] 1. 22

Power Trends for Processors 1000 © IEEE 2003 Power per chip [W] 100 10 rs a e y 3 / 1 s ar e y 3 / x 1. 4 x 4 0. 1 0. 01 1980 Low Power Design Essentials © 2008 MPU DSP 1985 1990 1995 Year [Ref: T. Sakurai, ISSCC’ 03] 2000 1. 23

Power Density Trend for Processors 10000 k 1000 Power density : p [W/cm 2] Scaling the Prime Reason! 0. 7 © IEEE 2003 P = PDYNAMIC (+ PLEAK) 3 100 k Constant V scaling and long-channel devices PDYNAMIC k 3 10 1 0. 1 MPU DSP 1 Scaling variable: k 1 Design rule [µm] Low Power Design Essentials © 2008 10 Proportional V scaling and short-channel devices PDYNAMIC k 0. 7 0. 1 [Ref: T. Sakurai, ISSCC’ 03] 1. 24

Evolution of Supply Voltages in the Past 5 4. 5 Supply Voltage (V) 4 3. 5 3 2. 5 2 1. 5 1 0. 5 1 -1 10 Minimum Feature Size (micron) Supply voltage scaling only from the 1990’s Low Power Design Essentials © 2008 1. 25

Subthreshold Leakage As an Extra Complication 120 1 100 0. 8 80 0. 6 0. 4 0. 2 VDD Technology node VTH 2 60 40 20 0 0 2002 ’ 04 ’ 06 ’ 08 ’ 10 ’ 12 ’ 14 ’ 16 Power [µW / gate] Voltage [V] 1. 2 Technology node[nm] © IEEE 2003 PLEAK Subthreshold leak (Active leakage) 1 0 2002 ’ 04 ’ 06 ’ 08 ’ 10 ’ 12 ’ 14 ’ 16 Year Low Power Design Essentials © 2008 PDYNAMIC Year [Ref: T. Sakurai, ISSCC’ 03] 1. 26

Static Power (Leakage) may Ruin Moore’s Law 1/100 10000 Leakage © IEEE 2003 Power per chip [W] 1000 x 1. 4 100 s r a e y /3 x 4 /3 x 1. 1 / 3 years ITRS requirement s ar 10 Dynamic ye 1 0. 01 1980 MPU DSP Processors published in ISSCC 1985 1990 1995 2000 2005 2010 2015 Year Low Power Design Essentials © 2008 [Ref: T. Sakurai, ISSCC 03] 1. 27

Power Density Increases Unsustainable in the long term 10000 Power Density (W/cm 2) Sun’s Surface Rocket Nozzle 1000 Nuclear Reactor 100 Upper Bound? 10 4004 8008 1 1970 8086 Hot Plate 8085 386 8080 286 1980 Low Power Design Essentials © 2008 P 6 Pentium® proc 486 1990 Year 2000 [Courtesy: S. Borkar, Intel] 2010 1. 28

Projecting Into the Future FD-SOI Dual Gate Compute density: k 3 Leakage power density: k 2. 7 Active power density: k 1. 9 Power density (active and static) accelerating anew. Technology innovations help, but impact limited. 2005 ITRS – Low operating power scenario Low Power Design Essentials © 2008 2003 ITRS – Low operating power scenario 1. 29

Complicating the Issue: The Diversity of So. Cs Power budgets of leading general purpose (MPU) and special purpose (ASSP) processors Low Power Design Essentials © 2008 [Ref: many combined sources] 1. 30

Supply and Threshold Voltage Trends Slide 1. 30 1 0. 9 0. 8 0. 7 VDD/VTH = 2! VDD 0. 6 0. 5 0. 4 0. 3 VT 0. 2 0. 1 0 2004 2006 2008 2010 2012 2014 2016 2018 2020 2022 Voltage reduction projected to saturate Optimistic scenario – some claims exist that VDD may get stuck around 1 V Low Power Design Essentials © 2008 [Ref: ITRS 05, Low power scenario] 1. 31

A 20 nm Scenario Assume VDD = 1. 2 V § FO 4 delay < 5 ps § Assuming no architectural changes, digital circuits could be run at 30 GHz § Leading to power density of 20 k. W/cm 2 (? ? ) Reduce VDD to 0. 6 V § FO 4 delay ≈ 10 ps § The clock frequency is lowered to 10 GHz § Power density reduces to 5 k. W/cm 2 (still way too high) Low Power Design Essentials © 2008 [Ref: S. Borkar, Intel] 1. 32

A 20 nm Scenario (cntd) Assume optimistically that we can design FETs (Dual. Gate, Fin. Fet, or whatever) that operate at 1 k. W/cm 2 for FO 4 = 10 ps and VDD = 0. 6 V [Frank, Proc. IEEE, 3/01] § For a 2 cm x 2 cm high-performance microprocessor die, this means 4 k. W power dissipation. § If die power has to be limited to 200 W, only 5% of these devices can switching at any time, assuming that nothing else dissipates power. Low Power Design Essentials © 2008 [Ref: S. Borkar, Intel] 1. 33

An Era of Power-Limited Technology Scaling Technology innovations offer some relief – Devices that perform better at low voltage without leaking too much But also are adding major grieve – Impact of increasing process variations and various failure mechanisms more pronounced in low-power design regime. Most plausible scenario – Circuit and system level solutions essential to keep power/energy dissipation in check – Slow down growth in computational density, and use obtained slack to control power density increase. – Introduce design techniques to operate circuit at nominal, not worst-case, conditions Low Power Design Essentials © 2008 1. 34

Some Useful References … Selected Keynote Presentations § § § § Fred Boekhorst, ”Ambient intelligence, the next paradigm for consumer electronics: How will it affect Silicon? , ” Digest of Technical Papers ISSCC, pp. 28 -31, Febr. 02. Theo A. C. M. Claasen, “High speed: Not the only way to exploit the intrinsic computational power of silicon, ” Digest of Technical Papers ISSCC, pp. 22 -25, Febr. 99. Hugo De Man, “Ambient intelligence: Gigascale dreams and nanoscale realities, ” Digest of Technical Papers ISSCC, pp. 29 -35, Febr. 05. Patrick P. Gelsinger, Microprocessors for the new millennium: Challenges, opportunities, and new frontiers, ” Digest of Technical Papers ISSCC, pp. 22 -25, Febr. 01. Gordon E. Moore, “No exponential is forever: But "Forever" can be delayed!, ” Digest of Technical Papers ISSCC, pp. 20 -23, Febr. 03. Yrjö Neuvo, ”Cellular phones as embedded systems, ” Digest of Technical Papers ISSCC, pp. 32 -37, Febr. 04. Takayasu Sakurai, ”Perspectives on power-aware electronics, ” Digest of Technical Papers ISSCC, pp. 26 -29, Febr. 03. Robert Yung, Stefan Rusu, and Ken Shoemaker, Future trend of microprocessor design, Proceedings ESSCIRC, Sept. 2002. Books and Book Chapters § § § S. Roundy, P. Wright and J. M. Rabaey, "Energy Scavenging for Wireless Sensor Networks, " Kluwer Academic Publishers, 2003. F. Snijders, “Ambient Intelligence Technology: An Overview, ” In Ambient Intelligence, Ed. W. Weber et al, pp. 255 -269, Springer, 2005. T. Starner and J. Paradiso, “Human-Generated Power for Mobile Electronics, ” in “Low-Power Electronics”, C. Piguet, Editor, pp. 45 -1 -35, CRC Press 05. Low Power Design Essentials © 2008 1. 35

Some Useful References (cntd) Publications § § § § § A. Bar-Cohen, S. Prstic, K. Yazawa, M. Iyengar. “Design and Optimization of Forced Convection Heat Sinks for Sustainable Development”, Euro Conference –New and Renewable Technologies for Sustainable, 2000. S. Borkar, numerous presentations over the past decade … R. Chu, “The Challenges of Electronic Cooling: Past, Current and Future, ” Journal of Electronic Packaging, Vol 126, pp. 491, Dec. 2004. D. Frank, R. Dennard, E. Nowak, P. Solomon, Y. Taur, P. Wong, “Device scaling limits of Si MOSFETs and their application dependencies, ” Proceedings of the IEEE, Volume 89, Issue 3, pp. 259 – 288 , March 2001. International Technology Roadmap for Semiconductors, http: //www. itrs. net/ J. Markoff and S. Hansell, “Hiding in Plain Sight, Google Seeks More Power”, NY Times, http: //www. nytimes. com/2006/06/14/technology/14 search. html? _r=1&oref=slogin, June 2006. R. Nowak, “A DARPA Perspective on Small Fuel Cells for the Military, ” presented at Solid State Energy Conversion Alliance (SECA) Workshop, Arlington, March 2001. J. Rabaey et al. "Pico. Radios for wireless sensor networks: the next challenge in ultra-low power design, ” Proc. 2002 IEEE ISSCC Conference, pp. 200 -1, San Francisco, February 2002. R. Schmidt, “Power Trends in the Electronics Industry – Thermal Impacts, ” ACEED 03, IBM Austin Conference on Energy-Efficient Design, 2003. Toshiba, “Toshiba Announces World's Smallest Direct Methanol Fuel Cell With Energy Output of 100 Milliwatts, ” http: //www. toshiba. co. jp/about/press/2004_06/pr 2401. htm, June 2004. Low Power Design Essentials © 2008 1. 36