Instruction Set Architecture 1 CHAPTER 2 172022 Topics

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Instruction Set Architecture 1 CHAPTER 2 1/7/2022

Instruction Set Architecture 1 CHAPTER 2 1/7/2022

Topics for Discussion 2 Review of Chapter 1: introduction What is computer organization? What

Topics for Discussion 2 Review of Chapter 1: introduction What is computer organization? What will you learn in this course? Motherboard CPU: microprocessor Memory Instruction set architecture Stored program computer Interface between software and hardware Instructions Design principles Instructions, registers, and memory Simple instructions types and formats 1/7/2022

Computer Organization 3 Is the study of major components of a modern digital computer,

Computer Organization 3 Is the study of major components of a modern digital computer, their organization and assembly, and the architecture and inner workings of these components. It also deals with design principles for a good performance. 1/7/2022

What will you learn in this course? 4 How are high level language (HLL)

What will you learn in this course? 4 How are high level language (HLL) translated to the language of the hardware. How does hardware execute instructions? What is the interface between hardware and software? How does the software instruct (or control) the hardware to perform the needed function? What determines the performance of a program? How can a program improve performance? Original program, its translation, effectiveness of the hardware, other special techniques such as pipelining What techniques can by hardware designers to improve performance? 1/7/2022

Mother Board 5 Figure 1. 10 Contains packages of integrated circuit chips (IC chips)

Mother Board 5 Figure 1. 10 Contains packages of integrated circuit chips (IC chips) including a processor, cache (several), memory (DRAM), connections for IO devices (networks, disks) 1/7/2022

Central Processing Unit (CPU) 6 See Fig 1. 9 Example: Intel 80386 80486 Pentium

Central Processing Unit (CPU) 6 See Fig 1. 9 Example: Intel 80386 80486 Pentium Main components of a CPU are datapath and control unit Datapath is the component of the processor that performs (arithmetic) operations Control is the component of the processor that commands the datapath, memory , IO device according to instruction of the program Cache provides but fast memory that acts as a buffer for slower /larger memory outside the chip. 1/7/2022

IC chip manufacturing process 7 Lets discuss Fig. 1. 14 and 1. 15 Silicon

IC chip manufacturing process 7 Lets discuss Fig. 1. 14 and 1. 15 Silicon is a semiconductor: by adding appropriate elements, it can be turned into a conductor, insulator or can be made to switch between the two. 1/7/2022

Instruction set Architecture 8 An important abstraction between hardware and software. Lets discuss this

Instruction set Architecture 8 An important abstraction between hardware and software. Lets discuss this concept. Computer operation is historically called an instruction. Instructions stored similar to data in a memory give rise to an important foundational concept called the stored program computer. 1/7/2022

C to MIPS instruction 9 Consider a C language statement: f = (g +

C to MIPS instruction 9 Consider a C language statement: f = (g + h) – ( i + j) Compile • add t 0, g, h • add t 1, i, j • sub f, t 0, t 1 Design principle 1: simplicity favors regularity In the above example: all instructions have 3 operands 1/7/2022

Register set 10 Where do the data get stored in the CPU? Named locations

Register set 10 Where do the data get stored in the CPU? Named locations called registers? How many? Typical small compared to memory sizes. Registers: MIPS-32 has 32 register Denoted by s 0, s 1, etc. $s 0, $s 5 Temporary registers are denoted by $t 0, $t 1 1/7/2022

C to MIPS instruction (Take 2 with registers) 11 Consider a C language statement:

C to MIPS instruction (Take 2 with registers) 11 Consider a C language statement: f = (g + h) – ( i + j) Compile • add $t 0, $s 1, $s 2 • add $t 1, $s 3, $s 4 • sub $s 0, $t 1 Design principle 2: Smaller is faster Memory available as registers is 32 in number 1/7/2022

Memory Operations 12 Data and instructions are stored in memory outside the CPU. Data

Memory Operations 12 Data and instructions are stored in memory outside the CPU. Data is loaded from memory and stored in memory. Load word (lw) Store word (sw) 32 resgiters 230 words or 232 addressable locations or bytes 1/7/2022

C language to Memory instructions 13 g = h + A[8] Compile • lw

C language to Memory instructions 13 g = h + A[8] Compile • lw $t 0, 32($s 3) • add $s 1, $s 2, $t 0 • sw $t 0, 48($s 3) Base register concept: base register is $s 3 and Offset of 32 for 8 words and offset of 48 for 12 words 1/7/2022

Instruction Types 14 add and sub lw and sw Now lets see how we

Instruction Types 14 add and sub lw and sw Now lets see how we can deal with a constant value data. Consider C language statement: x = x +4 Too complex: lw $t 0, Addr. Const($s 1) add $s 3, $t 0 Instead how about: addi $s 3, 4 Summary is in Fig. 2. 4 Design principle 3: Make the common case fast. Example “addi” instead of add an constant from memory. 1/7/2022

Instruction format –R type 15 Op • 6 bits RS Rt Rd Shamt •

Instruction format –R type 15 Op • 6 bits RS Rt Rd Shamt • 5 bits funct • 6 bits Can we use the same format for addi and add? Then we will Have only 11 bit constant 1/7/2022

Instruction format – I type 16 Op • 6 bits Rs • 5 bits

Instruction format – I type 16 Op • 6 bits Rs • 5 bits Rt • 5 bits Constant or address • 16 bits Design principle 4: good design demands good compromise; Keep instruction length same needing different formats ; I and R type are examples 1/7/2022

Summary 17 Figure 2. 7 very nicely summarizes all we learned so far. MIPS

Summary 17 Figure 2. 7 very nicely summarizes all we learned so far. MIPS operands MIPS memory MIPS Assembly language MIPS instructions type and formats And of course, the four design principles. 1/7/2022