Instruction Cycle Two steps Fetch Execute Fetch Cycle

Instruction Cycle • Two steps: • Fetch • Execute

Fetch Cycle • Program Counter (PC) holds address of next instruction to fetch • Processor fetches instruction from memory location pointed to by PC • Increment PC – Unless told otherwise • Instruction loaded into Instruction Register (IR) • Processor interprets instruction and performs required actions

Execute Cycle • Processor-memory – data transfer between CPU and main memory • Processor I/O – Data transfer between CPU and I/O module • Data processing – Some arithmetic or logical operation on data • Control – Alteration of sequence of operations – e. g. jump • Combination of above

Bus Interconnection Schema

Traditional (ISA) (with cache)

High performance speed Bus

Cache • Small amount of fast memory • Sits between normal main memory and CPU • May be located on CPU chip or module

Typical Cache Organization

I/O Module Diagram

Arithmetic & Logic Unit • • • Does the calculations Everything else in the computer is there to service this unit Handles integers May handle floating point (real) numbers May be separate FPU (maths co-processor) May be on chip separate FPU (486 DX +)

ALU Inputs and Outputs

Addressing Modes • Immediate • Direct • Indirect • Register Indirect • Displacement (Indexed) • Stack

Addressing Diagram Immediate Instruction Opcode Operand Instruction Opcode Address A Memory Operand

Control Unit

Basic Elements of Processor • • • ALU Registers Internal data pahs External data paths Control Unit