Innovate SOC Processors TM WWW ANDESTECH COM Outline

晶心科技 Innovate SOC Processors. TM WWW. ANDESTECH. COM

Outline v. Company Introduction v. Products Introduction Page 2 ANDES Confidential

v. Company Introduction Page 3 ANDES Confidential

Overview of Andes Technology Andes Highlights • Founded in 2005 March • First tier investors and partners (Government VC, Media. Tek, and Faraday) • USD$20 M capital for financial stability Andes’ Mission • Provide the best processor-based So. C solution Market Opportunities • The demand of multi-standard and multi-functions for different applications due to the device convergence of consumer electronics • The BRICs demand a big volume for low cost products • Fast growing market in Asia, world-wide IC designs move to Asia Page 4 ANDES Confidential

Milestones v 03/2005 : Company established v 03/2006 : v 12/2006 : Andes ISA debut Ande. Sight/And. ESLive beta release v 07/2007 : v 10/2007 : Ande. Sight/And. ESLive v 1. 2 release First Andes. Core N 1213 -S release UMC 130 nm N 1213 hardcore at ~600 MHz v v v Ande. Sight 1. 3 release Andes. Core N 1003 -S release Ande. Sight 1. 3. 1 release Andes. Core N 903 -S release TSMC 90 nm N 1213 hardcore at ~660 MHz 04/2008 : 07/2008 : 09/2008 : Page 5 ANDES Confidential

v. Products Introduction Page 6 ANDES Confidential

Andes’ Main Lines of Business Ande. Star™ Andes. Core™ Andes 16/32 -bit Mixable ISA And. ESLive™ ESL Integrated Virtual Environment CPU Core Family Andes Embedded™ Optimized Target SW such as Linux/RTOS, Middleware, and Application Software. Ande. Sight™ Ande. Shape™ Integrated Development Environment Page 7 Ande. Soft™ So. C + EVB + ICE ANDES Confidential

v. Andes. Core™ Page 8 ANDES Confidential

Andes. Core. TM Market Segments Ø MID/Netbook Ø MFP Ø Networking Ø Gateway/Router Ø Home entertainment Ø Smartphone/Mobile phone Ø Portable audio/media player Ø DVB/DMB baseband Ø DVD Ø DSC Ø Toys, Games Ø MCU Ø Storage Ø Automotive control Ø Toys Page 9 High-end N 12 series Mid-range N 10 Series Low-end N 9 Series ANDES Confidential

N 903: Low-power Cost-efficient Embedded Controller v Features: § § § § Harvard architecture, 5 -stage pipeline. 16 general-purpose registers. Static branch prediction Fast MAC Hardware divider Fully clock gated pipeline 2 -level nested interrupt External instruction/data local memory interface Instruction/data cache APB/AHB-Lite/AMI bus interface Power management instructions 45 K ~ 110 K gate count 250 MHz @ 130 nm JTAG/EDM N 9 u. Core Instr LM/IF v Applications: § § MCU Storage Automotive control Toys Page 10 Instr Cache Data Cache External Bus Interface APB/AHB-Lite/AMI ANDES Confidential Data LM/IF

N 903 Competition Core’s Features N 903 ARM 7 TDMI Cortex-M 3 Harvard Von Neumann Harvard Pipeline Stages 5 3 3 Instruction Set 16 -/32 -bit mixable Thumb/ARM 16 -/32 -bit mixable 16 16 16 Static None Static 10 24 -42 12 Big and Little APB/AHB/AMI 1 AHB 3 AHB Lite Yes None Yes (external) Architecture General-purpose register # Branch prediction Interrupt latency (Cycle) Data endian support Bus Sleep Mode Vectored interrupt support Yes (internal/external) DMIPS/Mhz 1. 38 0. 95 1. 25 Core Area (mm 2) (TSMC 0. 13 G) *0. 42 0. 26 0. 43/0. 21 Core Power (m. W/MHz) (TSMC 0. 13 G) *0. 06 0. 165/0. 084 Max Frequency (Mhz) (TSMC 0. 13 G) *204 133 135/50 DMIPS (TSMC 0. 13 G) 281. 52 126. 35 168. 75/62. 5 Cost Performance (DMIPS/mm 2) 670. 3 486 393/298 *TSMC free library with max speed synthesis constraint Page 11 ANDES Confidential

N 1033 A: Lowe-power Cost-efficient Application Processor v Features: § § § § Harvard architecture, 5 -stage pipeline. 32 general-purpose registers Dynamic branch prediction Fast MAC Hardware divider Audio acceleration instructions Fully clock gated pipeline 3 -level nested interrupt Instruction/Data local memory Instruction/Data cache DMA support for 1 -D and 2 -D transfer AHB/AHB-Lite/APB bus MMU/MPU Power management instructions v Applications: § § § Portable audio/media player DVB/DMB baseband DVD DSC Toys, Games Page 12 ANDES Confidential

N 1033 A Competition Core’s Features N 1033 A ARM 926 EJ Pipeline Stages 5 5 Instruction Set 16 -/32 -bit mixable 16 or 32 General-purpose register# 32 16 Dynamic branch prediction 32/64 -Entry BTB No 1 D and 2 D No Physical tag Virtual tag Yes (64 addresses) No 3 No AHB/2 AHB/AHB-Lite/APB 2 AHB > 40 dedicated Few general DSP *280 276/238 1. 6 1. 1 Core Power (m. W/MHz) (TSMC 0. 13 G) *0. 12 0. 36 Core area (mm 2) (TSMC 0. 13 G) *1. 4 1. 61/1. 45 DMIPS (TSMC 0. 13 G) 448 303. 6 Cost Performance (DMIPS/MHz) 320 189 DMA support Cache tag index Vectored interrupt support Nested interruption level Bus Audio DSP instructions Max frequency (Mhz) (TSMC 0. 13 G) Performance (DMIPS/MHz) *TSMC free library with max speed synthesis constraint Page 13 ANDES Confidential

N 1213 – High Performance Application Processor v Features: § § § § § Harvard architecture, 8 -stage pipeline. 32 general-purpose registers Dynamic branch prediction. Multiply-add and multiply-subtract instructions. Divide instructions. Instruction/Data local memory. Instruction/Data cache. MMU AHB or HSMP(AXI like) bus Power management instructions v Applications: § § § JTAG/EDM N 12 Execution Core DTLB ITLB MMU Instruction Cache LM Portable media player MFP Networking Gateway/Router Home entertainment Smartphone/Mobile phone Data LM Data Cache DMA External Bus Interface AHB Page 14 EPT I/F ANDES Confidential HSMP

N 1213 Competition Core’s Features N 1213 ARM 1176 MIPS 24 K Instruction Set 16 -/32 -bit mixable 16 or 32 General-purpose register# 32 16 32 Page Table Support for MMU HW and SW HW only SW only Interrupt Stack Level 3 2 1 unaligned memory access ld/st multiple mode bit ld/st left/right uncached read burst use ld multiple none DMA support 1 D/2 D 1 D No Core die size (mm 2) (TSMC 90 G) *1. 38 1. 95/1. 00 *1. 44 Frequency (MHz) (TSMC 90 G) *580 620/320 *520 Core power (m. W/MHz) (TSMC 90 G) *0. 27 0. 37/0. 18 *0. 40 Performance (DMIPS/MHz) 1. 37 1. 22 1. 55 DMIPS (TSMC 90 G) *795 756/390 *748 Cost Performance (DMIPS/mm 2) 576. 1 387. 7 519. 4 *TSMC free library with max speed synthesis constraint Page 15 ANDES Confidential

Toolchains And. ESLive Simulator IDE And. ESLive Builder AICE Ande. Shape Ande. Sight Page 16 And. ESLive

v. And. ESLive ™ & Ande. Sight ™ Page 17 ANDES Confidential

Andes Total SW Solution user Integrated Development Environment (IDE) Andesight™ ICE Simulation Engine Andeslive™ Toolchains: Compiler Evaluation Assembler Andeshape™ Board Linker Debugger So. C Builder Andes SW Solution Page 18 = Andeslive™ + Andesight™ ANDES Confidential + Andeshape™

And. ESLive Highlights v So. C builder § § Pre-defined models of Andes. Core, peripheral IPs, bus Drag-n-Drop to add components and/or bus from Palette Two clicks to connect pins or ports Table driven and setting of components properties, memory map, and IRQ v Simulator § § Cycle-based and instruction-based simulator Fast to run software application Visibility of debugging and profiling data Simulation of I/O devices Page 19 ANDES Confidential

And. ESLive Models Page 20 ANDES Confidential

And. ESLive Virtual IO v v v UART LCD RTC PWM GPIO Page 21 ANDES Confidential

And. ESLive Builder Drag-n-Drop components and bus Page 22 Drag-n-Drop components and bus ANDES Confidential

Ande. Sight Installation v Installation package § § § Ande. Sight And. ESLive Toolchains Cygwin (Windows only) Demo cases v Optimum System requirements § § § Windows XP operating system 1 GB of RAM for minimum requirement 1. 41 GB of free disk space for Ande. Sight v 1. 3. 1 2. 00 GB of free disk space for Ande. Sight v 1. 3. 2 +400 MB if Cygwin is to be installed Page 23 ANDES Confidential

Ande. Sight UI Toolbar Project Explore Editor Properties and Console Page 24 ANDES Confidential Outline

v. Ande. Shape™ Page 25 ANDES Confidential

Ande. Shape™ v ADP-XC 5 FF 676 FPGA Based Development Platform Page 26 ANDES Confidential

v ADP-XC 5 FF 676 FPGA Based Development Platform Hardware features: • Xilinx XC 5 VLX 110 -1 FF 676 FPGA • Encrypted Bitstreams support • 144 pins SO-DIMM for SDRAM • 32 MB on-board NOR flash • 10/100 Ethernet • MII connector for external 10/100 PHY • RS 232 serial port x 2 • X-Bus expansion slot • AHB bus connector Page 27 • SD memory card slot • IDE connector • Xilinx XCF 32 P FPGA configuration flash • JTAG configuration port • Five user push button switches • LCD I/F • I 2 S Audio Codec • 7 segment LED display x 2 ANDES Confidential

Ande. Shape™ ADP-AG 101 Platform GPIOs Power Subsystem Memory Subsystem AHB Header Debug Port & AICE LCD Connector Key Pad Connector AG 101 SOC UARTs RJ 45 Connector CF & SD/MMC Slot (On the back) Page 28 ANDES Confidential Audio Codec Subsystem

Block Diagram of ADP-AG 101 N 1213 Bus Controller MAC 10/100 USB 2. 0 AHB Bus LCD Controller SDRAM Controller DMA Controller SRAM Controller AHB to APB Bridge PWM I 2 C GPIO INTC WDT Timer RTC APB Bus Power Manager Page 29 ST UART BT UART SSP CF I 2 S ANDES Confidential SD/ MMC

Features of ADP-AG 101 v AMBA 2. 0 based AHB environment for new IP verification v High integration flexibility for bus extension v 32 MBx 2 SDRAM with one SODIMM slot v 512 KB Boot ROM with 32 MBx 2 flash memory v Header for LCD plus touch screen module v 3 GPIO keypads and 6 x 6 Key pad header v On-board 10/100 PHY and RJ 45 connector v CF & SD slot, providing CF & SD/MMC card access v On-board AC 97 & I 2 S codec, selected by switch v 2 DB 9 UART connectors v Andes ICE interface for function debugging Page 30 ANDES Confidential

v. Ande. Soft ™ Page 31 ANDES Confidential

v OS § § v Libraries Linux v 2. 4, v 2. 6 Nucleus PLUS u. C/OS-II ECOS v Local Memory and DMA for non-OS v BSP v 2. 0. 0 § § § g. Lib. C § new. Lib. C § … v Device Drivers Linux v 2. 6 Andesboot Non-OS Demo Program ADP-AG 101 and ADP-XC 5 platform support Page 32 ANDES Confidential § § § Ethernet LCD controller DMA UART I 2 S, I 2 C …

Andes Software Solution Stack Andes Linux Software Solutions Applications Libraries Middleware Development Tools Device Drivers Operating Systems Page 33 Browser: Qt Webkit, Webkit/SDL, Dillo GUI: XFree 86, Xorg, QT/Embedded, SDL, Nano-X, FLTK Toolkit: GTK+, glib, pango, cairo, blackbox, tk, Image. Magick Networking: wget, curl, lynx, samba, rdesktop, amsn, dropbear, openssh, boa Multimedia: fbv, madplay, mplayer, vlc, gstreamer, gnash, ALSA audio API Utility: busybox, mtd, pkgconfig, opkg, tar, make, coreutils Script: bash, tcl, python Graphics: libjpeg, libpng, libtiff, libungig Audio: mp 3, aac, mp 4, ogg, AMR Video: mpeg-1, mpeg-4, h. 264, divx, xvid Utility: libz, libncurses, lib. SDL, libssl, libxml, libxslt, libcurl. libsqlite VOIP, ia. Solution JVM, Alvaview and III for Multimedia Toolchain: gcc, gdb, newlib, glibc, binutils, sid Debugging: AICE, Trace 32, gdbserver, kgdb, strace Profiling: oprofile, gprof, simulator profiling INTC, DMA, TIMER, UART, LCD, TOUCH PANEL, SD, PCI, USB, MAC RTC, CF, GPIO, WDT, SPI, SSP, I 2 S, AC 97, Wireless and so on Linux 2. 4 and Linux 2. 6 ANDES Confidential