IBM Power 595 1 IBM Power 595 2

IBM Power 595 서버 표준제안서 목차 1. IBM Power 595 서버 소개 (특장점 포함) 2. IBM Power 595 서버 성능 3. IBM Power 595 서버 아키텍쳐 4. IBM Power 595 서버 참고 사항 5. <Back-up Chart> 6. IBM UNIX 서버 제품 군 7. IBM Power 6 Architecture 8. Power. VM™ 9. Green Computing

IBM Power 595 표준제안서 1. IBM Power 595 서버 소개 IBM Power 595 서버 사양 요약 Power 595 POWER 6: 8 / 16 - 64 core Architecture 4. 2 and 5. 0 GHz Cache L 2: 4 MB/Core L 3: 32 MB/Chip DDR 2 Memory 16 GB to 4 TB ( Buffered / Chip. Kill ) Up to 8 Nodes Processor / Memory Nodes GX Bus ( System Bus) ( 8 Cores & Max: 512 GB Memory ) Point to Point Interconnect Hot Add / Concurrent Repair So. D 4 per Node Remote IO Drawers RIO-2 and Infini. Band Max: 12 Drawers ( IO Expansion ) Drawer: 20 IO slots & 16 DASD Virtualization Up to 254 partitions Redundant Service Processor CEC: Yes Node: Yes / Hot Failover Redundant Power & Cooling Yes / Concurrent Repair Redundant Clock Yes / Hot Failover Power / Thermal © Copyright IBM Corporation 2008 3 Active Energy Manager (Power Save)

IBM Power 595 표준제안서 2. IBM Power 595 서버 성능 IBM Power 595 성능 비교 - tpm. C § § § 1대의 64 -core 시스템이 6백만 tpm. C를 넘는 성능을 보여줍니다 ! HP Superdome보다 tpm. C 당 가격이 48% 비교 우위에 있습니다 ! Core당 성능이 HP 보다 거의 3배 이상 월등합니다 ! TPC-C Results Per Core tpm. C 6, 085, 166 64 -core 4, 092, 799 128 -core 95, 080 63, 020 31, 975 HP Superdome $2. 93/tpm. C HP Superdome IBM Power 595 System $2. 81/tpm. C Chip/Core/Thread IBM p 5 -595 (POWER 5+) System Availability IBM Power 595 (POWER 6) $/tpm. C Database OS tpm. C/Core IBM Power 595 (5. 0 GHz POWER 6) 32/64/128 12/10/08 $2. 81 IBM DB 2 9. 5 AIX V 5. 3 6, 085, 166 95, 080 IBM p 5 -595 (2. 3 GHz POWER 5+) 32/64/128 01/22/07 $2. 97 IBM DB 2 9. 5 AIX V 5. 3 4, 033, 378 63, 020 HP Superdome (1. 6 GHz Itanium 2) 64/128/256 08/06/07 $2. 93 Oracle 10 g HP-UX 11 i v 3 4, 092, 799 31, 975 Source: http: //www. tpc. org. All results are as of 6/10/2008. IBM results submitted June 10, 2008. Not all results listed. Results listed with processor chip/core/thread. © Copyright IBM Corporation 2008 9

IBM Power 595 표준제안서 2. IBM Power 595 서버 성능 IBM Power 595 성능 비교 - World’s most powerful UNIX system for SAP IBM Power 595는 HP Superdome 에 비해 2배 이상의 코어당 성능 수치를 보여줍니다 !! SAP SD 2 -tier Standard Application Benchmark 35, 400 Users / core 30, 000 553 21, 000 10, 175 IBM Power 595 32 processor 64 -core 128 -thread #2008019 234 HP Superdome 64 processor 128 -core 256 -thread #2006089 Fujitsu PRIMEPOWER 2500 128 -way #2005013 Sun Fire E 25 k IBM Power 595 72 -way #2004039 HP Superdome Benchmark Users Configuration Chips, Cores, Threads Memory Software Cert # Response Time 35, 400 IBM Power 595 32, 64, 128 512 GB SAP ECC 6. 0, AIX 6. 1, DB 2 9. 5 2008019 1. 94 sec 30, 000 HP Integrity Superdome sx 2000 9150 64, 128, 256 512 GB SAP ECC 6. 0, HP-UX 11 i. V 3, Oracle 10 g 2006089 1. 80 sec 21, 000 Fujitsu PRIMEPOWER 2500 128 w 512 GB SAP 4. 70, Solaris 9, Oracle 9 i 2005013 1. 91 sec 10, 175 Sun Fire Model E 25 k 72 w 576 GB SAP 4. 70, Solaris 9, Oracle 9 i 2004039 1. 95 sec Source www. sap/com/benchmark/ © Copyright IBM Corporation 2008 10 Results as of 4/8/08

IBM Power 595 표준제안서 2. IBM Power 595 서버 성능 IBM Power 595 성능 비교 – Java Performance : SPECjbb 2005 Power 595 는 3. 2 million BOPS 이상의 성능 수치를 보여줍니다. KBOPS / Core 60 >3 X 50 40 30 20 IBM Power 595 Sun Fire 25 K #1 HP Superdome 10 0 System (Processor, Cores) BOPS Date. BOPs/JVM IBM Power 595 (5. 0 GHz POWER 6 , 64 -core) 3, 435, 485 April - 2008 107, 359 Sun Fire E 25 K (1. 95 GHz Ultra. SPARC VI+, 144 -core) HP Superdome (1. 6 GHz Itanium 2, 128 -core) 2, 105, 264 2, 054, 864 May - 2007 29, 240 64, 215 **Source: www. spec. org/ All results as of 05/21/07 © Copyright IBM Corporation 2008 11

IBM Power 595 표준제안서 2. IBM Power 595 서버 성능 IBM Power 595 성능 비교 - 종 합 OLTP, Java, ERP 어떠한 어플리케이션에 서도 Power 595는 여러분이 원하는 성능을 보여줄 것입니다. TPC-C SPECjbb 2005 2 -tier SAP SD 64 -core IBM Power™ 595 6, 085, 166 3, 435, 485 35, 400 128 -core HP Integrity Superdome 4, 092, 799 2, 054, 864 30, 000 © Copyright IBM Corporation 2008 12

IBM Power 595 표준제안서 3. IBM Power 595 서버 아키텍쳐 Power 595 Technology § Ultra-high frequency dual core chip – 5. 0 GHz and 4. 2 GHz processors – 7 -way superscalar, 2 -way Enhanced SMT core – Integrated accelerators: • Decimal Floating-Point for business applications • Altivec Vectorized Math for HPC workloads – Full error checking and recovery – Dynamic power saving § Dual-core MCM design – Private, “butterflied” 4 MB L 2 cache per core – 32 MB shared L 3 cache – Four MCMs per processor book L 3 POWER 5 POWER 6 L 3 POWER 5 MCM Package 4 POWER 5 chips / 8 Cores 4 L 3 Cache chips System p 590 & p 595 Systems L 3 POWER 6 MCM Package 1 POWER 6 chip / 2 Cores 2 L 3 Cache chips Power 595 < Multi-chip Modules: POWER 5 and POWER 6 > 8 Cores § SMP Point-to-point Interconnect design improves internode communication – “Superlinear scaling” ensures the aggregate SMP link bandwidth grows faster than system capacity L 3 POWER 5 8 Cores 8 Cores < Power 595 Fabric 64 Cores…. > > © Copyright IBM Corporation 2008 13

IBM Power 595 표준제안서 3. IBM Power 595 서버 아키텍쳐 Power 595 8 - core Processor Node/ 64 – core System § Building block for larger systems – 64 -way system has 8 nodes § Eight off-node SMP links – Fully connects 8 nodes in a 64 -way / Additional link for RAS Off-node SMP interconnect Node L 3 L 3 P 6 P 6 P 6 P 6 P 6 P 6 P 6 P 6 P 6 P 6 P 6 P 6 P 6 P 6 P 6 P 6 P 6 P 6 L 3 L 3 Off-node SMP interconnect Power 595 Eight-Processor Node © Copyright IBM Corporation 2008 64 -Core Power 595 System 14

IBM Power 595 표준제안서 3. IBM Power 595 서버 아키텍쳐 Front View § More granular, modular growth - up to eight, 8 -core books in a new midplane design – Up to 8 Nodes Ethernet Hub • Split 4 above / 4 below Light Strip • 4 dual-core MCMs per book and Up to 512 GB Dual Node Memory Controllers – 32 DIMM slots per book (8 features) – 4 I/O loop adapter slots (RIO-2 or 12 X) § Primary system rack supports up to 3 additional I/O Drawers and a media drawer Dual System Controllers – Up to 60 PCI Slots – Up to 48 DASD Bays § Additional I/O drawers supported in expansion rack(s) Bulk Power Dual Clocks Nodes – Up to 12 24” RIO-2 I/O drawers – Up to 30 new 24” 12 X I/O drawers § Bulk power on top IO Drawers § 24 -inch frame § Optional 1 U Removable media drawer – DVD, Half high tape drives § Optional integrated battery backup © Copyright IBM Corporation 2008 15 Midplane

IBM Power 595 표준제안서 3. IBM Power 595 서버 아키텍쳐 Front View : Power 6 595 Detail Front View with 4 Nodes Installed Empty node spaces should ALWAYS have a filler installed Nodes Bulk Power Clock Cards Process Book (Node) Mounting Hardware CEC FSP Cards Book Slots Midplane Nodes I/O Drawer System FSP Card (or CEC FSP card) 24 -inch I/O Drawers I/O Drawer System Clock Cards © Copyright IBM Corporation 2008 16

IBM Power 595 표준제안서 3. IBM Power 595 서버 아키텍쳐 Rear Rack View / Blower Layout / Cooling § Direct airflow passthru : p 5 -595 S route § Exhaust diverted : Up & Down - Eliminate hot spots BP A § 16 cores / Blower : 4 Blower per System CEC Blowe rs w/MDA (4 x Air Flow max. ) Air Flow Blower I/O Drawe rs ts 20 IO Slo © Copyright IBM Corporation 2008 17 ts

IBM Power 595 표준제안서 3. IBM Power 595 서버 아키텍쳐 Power 595 System CEC Book Processor Book § Four POWER 6 chips – Four 2 -core MCMs – Eight cores § 32 DDR 2 DIMMs slots § Four GX slots § Two Service Processors Book Ser Proc filler DCA Bulk Power Serv Proc Ser Proc Book DCA Bulk Power DIMMs Book GX Adapter P 6 L 3 L 2 P 6 L 2 L 3 L 3 P 6 L 2 L 3 GX Adapter Max Config: w 64 Cores / 4 TB Memory w 32 GX Buses © Copyright IBM Corporation 2008 GX Adapter 18 P 6 L 3 L 2 P 6 P 6 L 2 L 3 DIMMs

IBM Power 595 표준제안서 3. IBM Power 595 서버 아키텍쳐 Node 상세설명 – Node Diagram DCAs Memory DIMM Slots (8 x) 공급된 부품별 변경해 (2 x) 350 V DC를 필요 전압으로 주는 모듈 Node Controller FSP 1 Cards (2 x) Node제어 ; 제어 통신만 하며 데이터 통신은 midplane 을 통해 이루어짐 Narrow GX I/O Cards (2 x) Memory DIMM Slots (24 x) I/O Drawer통신 관련 카드 Wide GX I/O Cards (2 x) I/O Drawer통신관련 카드 (Narrow GX card도 꽂을 수 있으 며 현재 wide GX 9119 -FHA GX adapters card 없음) MCMs 하나의 MCM에 두개의 core가 들어 가있음. 기존의 p 5 595의 경우 PU book안에 두 개의 MCM이 들어 가 있었으며 하나의 MCM에 8개의 core로 구성되어 있었음. #1814 RIO(HSL) adapter #1816 12 X(Infini. Band) adapter Up to four GX adapters per processor books Can mix GX adapter types on same book Minimum of one GX adapter needed per system © Copyright IBM Corporation 2008 (4 x) 19

IBM Power 595 표준제안서 3. IBM Power 595 서버 아키텍쳐 Power 595 Memory Design § Fully buffered DDR 2 memory DIMMs – Single high or double high DIMMs. – 32 DIMM slots per Node Memory Controller CH 0 CH 1 CH 2 § P 6 chip: – Utilizes 2 memory controllers per chip – 4 ports per memory controller. • Ports runs at 4 times the DRAM speed. § Buffer technology supports DDR 2 DRAMs with: – 8 data bits per DRAM module (X 8 organized) – 4 data bits per DRAM module (X 4 organized ) • Support for X 4 DRAMS allows migration of memory from POWER 5+ systems. Per Channel § Write: 1 Byte § Read: 2 Bytes § Up to 4 TB memory supported on 5. 0 GHz 64 -core system – 32 DIMM slots per book – identical features required per processor book – New 0/64 GB feature with 16 GB DIMMs § New, high-speed, buffered DDR 2 DIMMs – New 0/4, 0/8, 0/16, 0/32 GB features – Feature conversions offered as part of Power 595 upgrades § Dual memory controllers per chip – Maximum aggregate data rate of over 1. 3 TB/sec § Support for migration of selected POWER 5+ DDR 2 DIMMs available 4 Q 08 © Copyright IBM Corporation 2008 20 CH 3

IBM Power 595 표준제안서 3. IBM Power 595 서버 아키텍쳐 프로세스북 코어 구성 규칙 § POWER 595의 최소 구성은 – 4. 2 GHz의 경우 8 core -16 GB(4 feature : 16 DIMMs )- I/O drawer 한 개 – 5. 0 GHz의 경우 16 core - 32 GB § 다른 스피드를 가지는 프로세서를 같은 시스템 안에 구성할 수 없음, 즉 모두 4. 2 Ghz 또는 모두 5. 0 Ghz로 구성해야 함 § 각각의 프로세서북당 최소 3 core는 activation 시키셔야 합니다. (아래 표 참조) – 4. 2 GHz는 최소 3 core, 5. 0 GHz는 최소 6 core부터 구성이 가능합니다 – CBU systems are the exception with exactly 4 activations Activations (Min – max) 8 cores 16 cores 24 cores 32 cores 40 cores 48 cores 56 cores 64 cores 4. 2 GHz 3 -8 6 - 16 9 - 24 12 - 32 15 - 40 18 - 48 21 - 56 24 - 64 5. 0 GHz n/a 6 - 16 9 - 24 12 - 32 15 - 40 18 - 48 21 - 56 24 - 64 4. 2 GHz CBU n/a n/a n/a 4 -4 5. 0 GHz CBU n/a n/a n/a 4 -4 © Copyright IBM Corporation 2008 21

IBM Power 595 표준제안서 3. IBM Power 595 서버 아키텍쳐 프로세스 북 당 메모리 구성 규칙 DIMM slots § Minimum 4* IDENTICAL memory features (one feature per 2 -core MCM) DIMM slots § Can NOT mix different size/type DIMMs in same processor book, (different books can use different DIMMs) § Must have 4, 6, or 8 IDENTICAL memory features* Processor Book: 32 DIMM slots max 8 memory features DIMM Size Memory Speed ** Memory Feat @@ DIMMs per Feat Memory Feat 1 Book Min/Max 8 Book Maximum 1 GB 667 MHz #5693 4 0/4 GB 16 / 32 GB 256 GB 2 GB 667 MHz #5694 4 0/8 GB 32 / 64 GB 512 GB 4 GB 533 MHz #5695 4 0/16 GB 64 / 128 GB 1 TB 8 GB 400 MHz #5696 4 0/32 GB 128 / 256 GB 2 TB 16 GB @ 400 MHz #5697 4 0/64 GB 512 / 512 GB 4 TB * If 0/64 GB feature, minimum = 8 features per book, vs 4 features ** Each processor book runs its memory at that memory’s MHz, @Available only on 5. 0 GHz 595, not on 4. 2 GHz 595. Availability planned Nov 2008 @@ 820 x bulk memory package and 450 x migrated memory features not shown © Copyright IBM Corporation 2008 22

IBM Power 595 표준제안서 3. IBM Power 595 서버 아키텍쳐 DDR 2 Buffered 메모리 Activations 규칙 § Rules per processor book – Minimum 16 GB activations (per book) § Rules per memory feature – Minimum 50% activation for 0/8, 0/16 and 0/32 GB features – Minimum 100% activations for 0/4 and 0/64 GB features & 820 x bulk features – PU book당 최소 16 GB를 구성하셔야 하므로 4 GB로 구성시에는(16 GB for 1 GB DIMMs) 100% activation 시켜야 함 © Copyright IBM Corporation 2008 23 Activation features Quantity memory activated #5680 1 GB #5681 256 GB Memory Feat ## Memory Feat Required Min activations #5693 0/4 GB #5694 0/8 GB 4 GB #5695 0/16 GB 8 GB #5696 0/32 GB 16 GB #5697 @ 0/64 GB #8201 32 x #5694 256 GB #8202 16 x #5695 256 GB #8203 32 x 5695 512 GB #8204 16 x #5696 512 GB #8205 @ 32 x 5697 2 TB @Available only on 5. 0 GHz 595, not on 4. 2 GHz 595. Availability planned Nov 2008

IBM Power 595 표준제안서 4. IBM Power 595 서버 참고 사항 Power 595 System - Next generation I/O drawer for Power 595 § New 24” 12 X I/O drawer can increase I/O transfer rates almost 3 x – 20 PCI-X adapter slots : 14 - PCI-X 2. 0 and 6 - PCI-X – 16 disk bays § 12 X I/O drawers may coexist with RIO-2 I/O drawers on Power 595 – RIO-2 I/O drawers (#5791, #5794) will continue as default I/O drawer until November, when 12 X I/O drawer is available § Feature conversion will be available for Power 595 RIO-2 I/O drawers to convert to 12 X drawers – Or purchase new 12 X I/O drawer and migrate PCI-X cards from RIO-2 drawer to gain performance benefits #5791/#5794 #5797/#5798 RIO GX slot adapter 12 X GX slot adapter 16 / 20 Sustained Simplex Data Rate 1. 45 GBS 3. 5 GBs 2. 4 x Faster Sustained Duplex Data Rate 1. 7 GBS 5 GBs 2. 9 x Faster Availability May 2008 November 2008 Connectivity Max DASD/PCI © Copyright IBM Corporation 2008 24 Benefit

IBM Power 595 표준제안서 4. IBM Power 595 서버 참고 사항 Power 595 System - Switch Layout Bulk Ethernet Hub Bulk Power Light Strips Media Drawer Ethernet Hubb § Dual (redundancy) 24 port Ethernet switches – Front and Back Light Strip Node § Service Processor, Power Supply and HMC communications Midplane § Not like Integrated Virtual Ethernet Adapters of Power 570 – Not directly used by AIX, Linux or IBM i Service HMC Laptop Node IO Node 10/100 Ethernet Switch 24 Ports Back IO B P C F S P B P C S E R P B O O K S E R S E R P P B O O K S E R P P B O O K S E R P P B O O K 10/100 Ethernet Switch 24 Ports Front Service Laptop HMC © Copyright IBM Corporation 2008 BPC = bulk power controller, FSP = flexible service processor 25 ser p = service processor S E R P

IBM Power 595 표준제안서 4. IBM Power 595 서버 참고 사항 Power 595 System - Clocking § Central oscillator card provides clock signals to the entire system. – Actively redundant § Oscillator cards plugs into the midplane – Concurrently maintainable. § Clock failures: – System will dynamically switch to the redundant oscillator card § Separate processor, memory and Time of Day (TOD) clocks are provided – TOD clock is accurate to 2 ppm – Keeps error to approximately 1 minute per year or less. Mid Plane Clock Cards Clock © Copyright IBM Corporation 2008 26 Clock

IBM Power 595 표준제안서 4. IBM Power 595 서버 참고 사항 Power 595 System – SAS Media Drawer Tape DVD Or Tape no location specify feature § Max one #5720 drawer per system § Power for #5720 drawn from first #579 x I/O drawer – Power cords and SAS cables provided with the #5720 – no specific 9119 feature required § 9119 -590/595 SCSI Removable Media Drawer #5795 not supported on 9119 -FHA § #5912 SAS PCI Adapters run the DVD/tape drives – Adapters located in PCI slot in #5798/5797/5791/5794 located in the primary I/O drawer (EIA 5) – Supported by AIX/Linux – No support announced by IBM i for SAS controller § 1 U 24 -inch drawer with two half-high slots/bays – It has two 5. 25 inch Half High media bays for SAS and SATA devices. – DVD-ROM or DVD-RAM • Max one bay for DVD, but up to two DVD drives can fit – SAS Tape • If #5798/5797, max two bays for tape • If #5791, max one bay for tape • Drives: 80/160 GB DAT, LTO-4 © Copyright IBM Corporation 2008 27 #8449 location specify Power source

IBM Power 595 표준제안서 4. IBM Power 595 서버 참고 사항 Power 595 System – Light Strips § The Power 595 system utilizes a front and back light strip for service. § Both, the front and rear light strips have redundant control modules that can receive input from either FSP. § When identifying FRUs within a node (MCM’s, DIMMs, hub cards or node controllers), both the FRU LED (within the node, or on the lightstrip) and the Node LED (on the lightstrip) must be turned on. Bulk Power Light Strips Media Drawer Ethernet Hubb Node Midplane Node IO Node Lightstrip은 앞서 말한 바와 같이 H/W적으로 문제가 있을 경우 육안으로 쉽 게 확인 할 수 있게 함. IO Node Front Lightstrip Rear Lightstrip © Copyright IBM Corporation 2008 28 Light Strip

IBM Power 595 표준제안서 4. IBM Power 595 서버 참고 사항 Power 595 System – Detecting Errors / Failures 1000’s Checkers p 690 p 5 -595 FIR Bits Fault Isolation Registers 1000’s Fir Bits Checkers 595 p 690 § Extensive checkers throughout hardware © Copyright IBM Corporation 2008 29 p 5 -595

IBM Power 595 표준제안서 4. IBM Power 595 서버 참고 사항 Power 595 Bandwidth Memory Bus Size Bandwidth L 1 ( Data ) 2 x 8 B 80 GB/sec L 2 2 x 32 B 160 GB/sec L 3 4 x 8 B 80 GB/sec 2. 56 TB / sec per System Memory System 4 x 1 B Write 4 x 2 B Read 1366 GB/sec per System 40 GB/sec per chip Intra-Node Buses System 6 x 8 B Inter-Node Buses 4 x 8 B 26. 7 GB/sec 28 Interconnects 746. 7 GB/sec per System GX Bus © Copyright IBM Corporation 2008 42. 7 GB/sec 160 GB /sec per Node 1280 GB /sec per System 20 GB/sec 2 x 4 B 640 GB/sec per System 30

IBM Power 595 표준제안서 5. 595 Family Positioning Comparison p 5 595 vs. Power 595 비교 p 5 -595 Power 595 24 -inch rack 24 -in rack Cores 16 - 64 8 / 16 - 64 Activations 16 - 64 3 / 6 – 64 GHz clock 1. 65 GHz & 1. 9 GHz 4. 2 GHz & 5. 0 GHz Processor POWER 5 POWER 6 1. 9 MB 4 MB Shared Dual Core Per Core Footprint, packaging L 2 Cache 36 MB L 3 Cache Shared Dual Core Single Path Dual 16 MB Dual Paths Max GB memory 2 GB to 2 TB 16 GB to 4 TB Max PCI-X slots 240 / 600 LPARs 254 Dual / Cold Fail over No No 12 811 GB/sec 72 GB/sec 272 Dual / Hot Fail over Yes 12 / 30 1. 3 TB/sec 72 / 160 GB/sec 552 Clocks / Fail over Alt Processor Recovery Hot Add Proc / Memory I/O drawers Memory Bandwidth I/O Bandwidth Performance r. Perf © Copyright IBM Corporation 2008 31 TPC / Watt p S e r i 23% e s Improvement